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首页> 外文会议>Conference on Design for Manufacturability through Design-Process Integration; 20080128-29; San Jose,CA(US) >32nm Design Rule Evaluation through Virtual Patterning
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32nm Design Rule Evaluation through Virtual Patterning

机译：通过虚拟图案进行32nm设计规则评估

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摘要

Lithography simulation has proven to be a technical enabler to shorten development cycle time and provide direction before next-generation exposure tools and processes are available. At the early stages of design rule definition for a new technology node, small critical areas of layout are of concern, and optical proximity correction (OPC) is required to allow full exploration of the 2D rule space. In this paper, we demonstrate the utility of fast, resist-model-based, OPC correction to explore process options and optimize 2D layout rules for advanced technologies. Unlike conventional OPC models that rely on extensive empirical CD-SEM measurements of real wafers, the resist-based OPC model for the correction is generated using measured bulk parameters of the photoresist such as dissolution rate. The model therefore provides extremely accurate analysis capability well in advance of access to advanced exposure tools. We apply this 'virtual patterning' approach to refine lithography tool settings and OPC strategies for a collection of 32-nm-node layout clips. Different OPC decorations including line biasing, serifs, and assist features, are investigated as a function of NA and illumination conditions using script-based optimization sequences. Best process conditions are identified based on optimal process window for a given set of random layouts. Simulation results, including resist profile and CD process window, are validated by comparison to wafer images generated on an older-generation exposure tool. The ability to quickly optimize OPC as a function of illumination setting in a single simulation package allows determination of optimum illumination source for random layouts faster and more accurately than what has been achievable in the past. This approach greatly accelerates design rule determination.
机译：光刻模拟已被证明是缩短开发周期时间并在下一代曝光工具和工艺可用之前提供指导的技术推动力。在新技术节点的设计规则定义的早期阶段，应关注布局的关键小区域，并且需要光学邻近校正（OPC）才能全面探索2D规则空间。在本文中，我们演示了基于抗蚀剂模型的快速OPC校正在探索工艺选项和优化2D布局规则以用于先进技术方面的实用性。与依赖于实际晶圆的广泛经验CD-SEM测量的常规OPC模型不同，使用测得的光刻胶体积参数（例如溶解速率）生成用于校正的基于抗蚀剂的OPC模型。因此，该模型可以在使用高级曝光工具之前提供非常准确的分析功能。我们采用这种“虚拟图案化”方法来完善光刻工具设置和OPC策略，以收集32纳米节点布局片段。使用基于脚本的优化序列，研究了不同的OPC装饰，包括行偏置，衬线和辅助功能，它们是NA和照明条件的函数。基于给定的一组随机布局的最佳工艺窗口，可以确定最佳工艺条件。通过与旧版曝光工具生成的晶圆图像进行比较，可以验证包括抗蚀剂轮廓和CD处理窗口在内的仿真结果。通过在单个仿真程序包中根据照明设置快速优化OPC的能力，可以比过去更快速，更准确地确定随机布局的最佳照明源。这种方法大大加快了设计规则的确定。

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