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首页> 外文会议>Conference on Reconfigurable Technology: FPGAs and Reconfigurable Processors for Computing and Communications Ⅳ, Jul 30, 2002, Boston, USA >Design flow for the reconfigurable HW platform XPP
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Design flow for the reconfigurable HW platform XPP

机译：可重新配置的硬件平台XPP的设计流程

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摘要

Due to an increasing technology progress in the configurable hardware sector, which is currently dominated by FPGAs, new approaches like very fast re-configurable devices with ALU level granularity are on the rise. However, these coprocessor devices can not be programmed with conventional HW nor SW design approaches. To solve this dilemma, a combination is needed. This approach is described in this paper. Furthermore, an example how to program a re-configurable device is illustrated. This example consists of parts of an MPEG-4 decoder, which is running on the re-configurable processor platform XPP. The partitioning of these decoding algorithms into modules and the means of interaction between these modules is highlighted. In addition, the embedding of this algorithm in a XPP system is outlined.
机译：由于可配置硬件领域的技术进步不断增加，目前该领域主要由FPGA主导，诸如ALU级粒度的非常快速的可重新配置设备之类的新方法正在兴起。但是，这些协处理器设备无法使用常规的硬件或软件设计方法进行编程。为了解决这个难题，需要结合起来。本文介绍了这种方法。此外，示出了如何对可重新配置的设备进行编程的示例。此示例由MPEG-4解码器的一部分组成，该解码器在可重新配置的处理器平台XPP上运行。将这些解码算法划分为模块，并强调这些模块之间的交互方式。另外，概述了该算法在XPP系统中的嵌入。

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