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首页> 外文会议>Design, Fabrication, and Characterization of Photonic Devices >Monolithically integrated detector/receiver in standard CMOS operating at 250 Mbit/s for low-cost plastic optical fiber data links
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Monolithically integrated detector/receiver in standard CMOS operating at 250 Mbit/s for low-cost plastic optical fiber data links

机译：标准CMOS中的单片集成检测器/接收器，以250 Mbit / s的速度运行，用于低成本塑料光纤数据链路

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Abstract: To solve the 'lower frequency gain' that limits the sped of conventional CMOS detectors, we spatially modulate CMOS photo diode junctions. This gives a differential photodiode with a flat responsivity curve up to a $MIN@3db bit rate of more than 500 Mbit/s. Detector and circuitry can now be combined on a single low cost CMOS chip for datacom applications. Here we report on the first integration of a receiver with a 300 $mu@m diameter detector intended for use in plastic optical fiber (POF) links. The diameter of the detector allows to choose for large multimode POF cores and low precision mechanical connectors. The receiver circuit is fully differential from the detector onwards, for improved power supply rejection. A differential feedback mechanism filters out the DC-level. A final symmetric OTA converts the differential signal to a single ended digital output. The total chip area including bonding pads is 440 $mu@m $MUL 600 $mu@m. The received optical power to obtain a BER of 10$+$MIN@9$/ is $MIN@17.6 dBm at a bit rate of 155 Mbit/s and $MIN@12.2 dBm at 250 Mbit/s bit rate. The chip dissipates only 25.3 mW at a 3.3V power supply. The bit rate is receiver limited. A design in a smaller feature size CMOS technology will show even better bit-rate and/or sensitivity performance. In conclusion, it is now possible to make detector/receivers combinations in standard CMOS lowering the overall cost of a POF data link system. !6
机译：摘要：为了解决限制传统CMOS检测器加速的“较低频率增益”，我们在空间上调制CMOS光电二极管结。这样就产生了具有平坦响应曲线的差分光电二极管，最高$ MIN @ 3db比特率超过500 Mbit / s。现在可以将检测器和电路组合在单个低成本CMOS芯片上，以用于数据通信应用。在这里，我们报告接收器与用于塑料光纤（POF）链路的直径为300μm的检测器的首次集成。检测器的直径允许选择大型多模POF磁芯和低精度机械连接器。接收器电路与检测器之前的电路完全差分，以改善电源抑制性能。差分反馈机制滤除直流电平。最终的对称OTA将差分信号转换为单端数字输出。包括焊盘在内的芯片总面积为440 $μm@MUL 600 $ mu @ m。获得BER为10 $ + $ MIN @ 9 $ /的光功率在155 Mbit / s的比特率下为$MIN@17.6 dBm，在250 Mbit / s的比特率下为$MIN@12.2 dBm。该芯片在3.3V电源下的功耗仅为25.3 mW。比特率受接收机限制。具有较小特征尺寸的CMOS技术的设计将显示出更高的比特率和/或灵敏度性能。总之，现在有可能在标准CMOS中实现探测器/接收机的组合，从而降低POF数据链路系统的总体成本。 ！6

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