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A Genuine Design Manufacturability Check for Designers

机译：面向设计师的正版设计可制造性检查

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The design of integrated circuits (ICs) has been made possible by a simple contract between design and manufacturing: Manufacturing teams encapsulated their process capabilities into a set of design rules such as minimum width and spacing or overlap for each layer, and designers complied with these design rules to get a manufacturable IC. However, since the advent of 90nm technology, designers have to play by the new rules of sub-90nm technologies. The simple design rules have evolved into extremely complex, context-dependent rules. Minimum design rules have been augmented with many levels of yield-driven recommended guidelines. One of the main drivers behind these complex rules is the increase in optical proximity effects that are directly impacting systematic and parametric yields for sub-90nm designs. The design's sensitivity to optical proximity effects increases as features get smaller, however design engineers do not have visibility into the manufacturability of these features. A genuine design for manufacturing (DFM) solution for designers should provide a fast, easy-to-use and cost-effective solution that accurately predicts the designs sensitivity to shape variations throughout the design process. It should identify and reduce design sensitivity by predicting and reducing shape variations. The interface between manufacturing and design must provide designers with the right information to allow them to maximize the manufacturability of their design while shielding them from the effects of resolution enhancement technologies (RET) and manufacturing complexity. This solution should also protect the manufacturing know-how in the case of a fabless foundry flow. Currently, the interface between manufacturing and design solely relies on design rules that do not provide these capabilities. A common proposition for design engineers in predicting shape variation is to move the entire RET/OPC/ORC into the hands of the designer. However, this approach has several major practicality issues that make it unfeasible, even as a "service" offered to designers: 1. Cost associated with replicating the flow on designer's desktop. 2. The ability of designers to understand RET/OPC and perform lithographic judgments. 3. Confidentiality of the recipes and lithographic settings, especially when working with a foundry. 4. The level of confidence the fab/foundry side has in accepting the resulting RET/OPC. 5. Runtime and data volume explosion. 6. The logistics of reflecting RET/OPC and manufacturing changes. 7. The ability to tie this capability to EDA optimization tools. In this paper we present a new technique and methodology that overcomes these hurdles and meets both the design and manufacturing requirements by providing a genuine DFM solution to designers. We outline a new manufacturing-to-design interface that has evolved from rule-based to model-based, and provides the required visibility to the designer on their design manufacturability. This approach is similar to other EDA approaches which have been used to successfully capture complex behavior by using a formulation that has a higher level of abstraction (for example, SPICE for transistor behavior). We will present how this unique approach uses this abstracted model to provide very accurate prediction of shape variations and at the same time, meet the runtime requirements for a smooth integration into the design flow at 90nm and below. This DFM technology enables designers to improve their design manufacturability, which reduces RET complexity, mask cost and time to volume, and increases the process window and yield.
机译：通过设计与制造之间的简单合同，就可以进行集成电路（IC）的设计：制造团队将其工艺能力封装到一组设计规则中，例如每一层的最小宽度和间距或重叠，并且设计者必须遵守这些规则设计规则以获得可制造的IC。但是，自从90nm技术问世以来，设计人员就不得不遵守90nm以下技术的新规则。简单的设计规则已演变为极其复杂的上下文相关规则。最低设计规则已通过良率驱动的建议指南的许多级别得到了增强。这些复杂规则背后的主要驱动力之一是光学邻近效应的增加，这直接影响了90nm以下设计的系统和参数成品率。随着功能变得越来越小，设计对光学邻近效应的敏感性也随之增加，但是设计工程师对这些功能的可制造性不了解。面向设计师的真正的制造设计（DFM）解决方案应提供一种快速，易于使用且具有成本效益的解决方案，该解决方案可以准确地预测设计在整个设计过程中对形状变化的敏感性。它应该通过预测和减少形状变化来识别并降低设计敏感性。制造与设计之间的接口必须为设计师提供正确的信息，以使他们能够最大程度地提高设计的可制造性，同时使他们免受分辨率增强技术（RET）和制造复杂性的影响。在无晶圆厂铸造流程的情况下，该解决方案还应保护制造专有技术。当前，制造与设计之间的接口仅依赖于不提供这些功能的设计规则。设计工程师在预测形状变化时的一个普遍建议是将整个RET / OPC / ORC移交给设计人员。但是，这种方法有几个主要的实用性问题，即使是为设计人员提供的“服务”，也使其不可行：1.与在设计人员的桌面上复制流程相关的成本。 2.设计者了解RET / OPC和执行光刻判断的能力。 3.配方和光刻设置的机密性，尤其是在铸造厂工作时。 4.晶圆厂/铸造厂对接受最终的RET / OPC的信心水平。 5.运行时和数据量激增。 6.反映RET / OPC和制造变更的物流。 7.将此功能与EDA优化工具联系在一起的能力。在本文中，我们提出了一种新技术和新方法，可通过为设计师提供真正的DFM解决方案来克服这些障碍并同时满足设计和制造要求。我们概述了一个新的从制造到设计的界面，该界面已经从基于规则的演化为基于模型的界面，并为设计人员提供了设计可制造性所需的可见性。此方法类似于其他EDA方法，该方法已通过使用具有更高抽象级别的制剂（例如，用于晶体管行为的SPICE）成功捕获了复杂的行为。我们将介绍这种独特的方法如何使用这种抽象的模型提供非常准确的形状变化预测，同时满足将运行时要求平稳集成到90nm及以下的设计流程中的要求。这种DFM技术使设计人员能够改善他们的设计可制造性，从而降低RET的复杂性，降低掩模成本和批量生产时间，并增加工艺窗口和成品率。

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