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首页> 外文会议>Electro-Optical and Infrared Systems: Technology and Applications IV; Proceedings of SPIE-The International Society for Optical Engineering; vol.6737 >Optimisation of a Geiger Mode Avalanche Photodiode Imaging Pixel based on a hybrid bulk SOI CMOS process
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Optimisation of a Geiger Mode Avalanche Photodiode Imaging Pixel based on a hybrid bulk SOI CMOS process

机译：基于混合体SOI CMOS工艺的Geiger模式雪崩光电二极管成像像素的优化

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摘要

Single photon detection has a wide variety of scientific and industrial applications including optical time domain reflectometry, astronomy, spectroscopy, defect monitoring of Complementary Metal Oxide Semiconductor (CMOS) circuits, fluorescence lifetime measurement and imaging. In imaging applications, the dead time is the time during which the detector is inhibited after a photon has been detected. This is a limiting factor on the dynamic range of the pixel. The rate of photon detection will saturate if the dead time is too large. Time constants generated by Metal Oxide Semiconductor (MOS) transistor bulk and sidewall capacitances adversely affect the dead time of pixels developed in conventional CMOS technology. In this paper, a novel imaging pixel configuration based on a Geiger Mode Avalanche Photodiode (GMAP) and fabricated using a dedicated hybrid bulk Silicon On Insulator (SOI) CMOS process is presented. The GMAP is fabricated in the bulk layer and the CMOS circuitry is implemented in the upper SOI layers. As a result, bulk and sidewall capacitance effects are significantly reduced. As both the diode and the CMOS transistors are on the same wafer there is a reduction in pixel area and an additional reduction in the parasitic capacitance effects. This leads to a significant improvement in pixel performance. Pixels incorporating 5 micron and 10 micron diameter GMAPs have been simulated. The circuits were optimised with a view to maximising the photon count rate. Results show a significant improvement in the dead time with values of 14 nanoseconds and 15 nanoseconds being observed for the 5 micron and 10 micron GMAPs respectively.
机译：单光子检测具有广泛的科学和工业应用，包括光学时域反射仪，天文学，光谱学，互补金属氧化物半导体（CMOS）电路的缺陷监控，荧光寿命测量和成像。在成像应用中，停滞时间是在检测到光子之后检测器被禁止的时间。这是像素动态范围的限制因素。如果死区时间过长，光子检测速率将达到饱和。由金属氧化物半导体（MOS）晶体管体和侧壁电容产生的时间常数会对常规CMOS技术中开发的像素的空载时间产生不利影响。在本文中，提出了一种基于盖革模式雪崩光电二极管（GMAP）的新颖成像像素配置，并使用专用的混合体绝缘体上硅（SOI）CMOS工艺制造。 GMAP制造在体层中，CMOS电路实现在上层SOI层中。结果，大大减小了体积和侧壁电容效应。由于二极管和CMOS晶体管都在同一晶片上，因此像素面积减小，寄生电容效应进一步减小。这导致像素性能的显着改善。已经模拟了包含5微米和10微米直径GMAP的像素。为了最大化光子计数率，对电路进行了优化。结果显示停滞时间有了显着改善，对于5微米和10微米GMAP分别观察到14纳秒和15纳秒的值。

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