Complementary Bipolar Fabricated by the Bonding of Patterned Buried Layers

机译：通过图案化掩埋层的结合制造互补双极

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This paper presents a technique for the fabrication of complementary bipolar circuits by the bonding of pre-processed wafers. Bonding of patterned buried layers allows the various long diffusions that are associated with well and sinker drives to be de-coupled from the buried layers allowing for the fabrication of high performance and/or high voltage devices. Bonding of patterned buried layers presents many problems, principally non-planar and chemically reactive surfaces. These can result in voids. In this paper we overcome these issues and present a process, which has been used to manufacture commercially available CBIC devices.

机译：本文提出了一种通过预处理晶片的键合制造互补双极电路的技术。图案化掩埋层的结合允许与阱和沉降片驱动器相关联的各种长扩散与掩埋层解耦，从而允许制造高性能和/或高压器件。图案化掩埋层的结合存在许多问题，主要是非平面和化学反应性表面。这些会导致空隙。在本文中，我们克服了这些问题，并提出了一种已用于制造商用CBIC器件的方法。

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来源
《Fifth International Symposium on Semiconductor Wafer Bonding, 5th, Oct 1999, Honolulu》|1999年|p.438-442|共5页
会议地点 Honolulu HI(US)
作者
P. Irissou; V. Pilloud; K. Yallup; A. Brown; G. Gaston; S. Blackstone;
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ASIC Advantage, 1275 Reamwood Ave., Sunnyvale, CA, 94089;

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原文格式 PDF
正文语种 eng
中图分类无线电电子学、电信技术;
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专利

1. Unified planar process for fabricating heterojunction bipolar transistors and buried heterostructure lasers utilizing impurity-induced disordering [J] . Thornton R.L., Mosby W.J. IEEE Transactions on Electron Devices . 1988,第12期

机译：利用杂质诱导的无序制造异质结双极晶体管和掩埋异质结构激光器的统一平面工艺
2. p-n-p heterojunction bipolar transistors with buried subcollector layers [J] . Bayraktaroglu B., Lambert S.A. IEEE Electron Device Letters . 1989,第3期

机译：具有埋藏子集电极层的p-n-p异质结双极晶体管
3. Ultrathin-body Ge-on-insulator wafers fabricated with strongly bonded thin AI_2O_3/SiO_2 hybrid buried oxide layers [J] . Yoshihiko Moriyama, Keiji Ikeda, Shotaro Takeuchi, _Applied Physics Express . 2014,第8期

机译：带有牢固结合的薄AI_2O_3 / SiO_2杂化埋层氧化物层的超薄绝缘体Ge绝缘体晶片
4. A high performance 36V complementary bipolar technology on low thermal resistance compound buried layer SOI substrates [C] . 2010 IEEE Bipolar/BiCMOS Circuits and Technology Meeting . 2010

机译：低热阻复合埋层SOI衬底上的高性能36V互补双极技术
5. Formation, characterization and sub-50 nm patterning of self-assembled monolayers with embedded disulfide bonds. [D] . Wang, Xuejun. 2003

机译：具有嵌入式二硫键的自组装单分子膜的形成，表征和低于50 nm的图案。
6. Bipolar Resistive Switching Characteristics of HfO2/TiO2/HfO2 Trilayer-Structure RRAM Devices on Pt and TiN-Coated Substrates Fabricated by Atomic Layer Deposition [O] . Wei Zhang, Ji-Zhou Kong, Zheng-Yi Cao, 2017

机译：HtO2 / TiO2 / HfO2三层结构RRAM器件在原子层沉积制备的Pt和TiN涂层衬底上的双极电阻转换特性
7. Effects of Rolling Reduction and Strength of Composed Layers on Bond Strength of Pure Copper and Aluminium Alloy Clad Sheets Fabricated by Cold Roll Bonding [O] . Yoji Miyajima, Kotaro Iguchi, Susumu Onaka, 2014

机译：Cold Roll键合制造的纯铜和铝合金包层粘合强度轧制减小和强度的影响
8. 3D-ICML: A 3D Bipolar ReRAM Design with Interleaved Complementary Memory Layers. [R] . Chen, Y., Li, H., Chen, Y., 2013

机译：3D-ICmL：具有交错互补存储层的3D双极ReRam设计。

Complementary Bipolar Fabricated by the Bonding of Patterned Buried Layers

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