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首页> 外文会议>IMAPS 2008 - 41st international symposium on microelectronics: bringing together the entire microelectronics supply chain >Understanding Power Integrity in System Designs
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Understanding Power Integrity in System Designs

机译：了解系统设计中的电源完整性

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Designing optimal power supply scheme for high speed digital systems has become a great challenge in recent years as designs move towards low voltage systems with high current capacity and high data rates. The fundamental problem that designers face today is how to efficiently provide sufficient and stable power supply to core circuitry and IOs on chips through printed circuit boards (PCBs) and packages. To achieve such design goal in low voltage systems, low impedance path has to be designed and implemented on the entire power delivery network, i.e. power consumption over packages and PCBs needs to be minimized and controlled within design budget.rnThis paper first discusses the three important aspects of Power Integrity (PI), sufficiency, efficiency, and stability. It emphasizes that IC designers need to be aware that a low power device will not work properly if power consumption on package and board is not carefully analyzed and managed. The paper then presents how power delivery system (PDS) should be designed, modeled, analyzed, and verified using IC/package/board co-design methodologies. Finally, it demonstrates co-design and co-simulation flows of package-aware IC power design, chip-aware package/board power design, and system power delivery validation. With the presented flows, designers are able to identify power delivery problems and correct them by modifying chip, package, or board designs to achieve sufficient, efficient, and stable power supply in low voltage systems.rnThe paper originates the three fundamental aspects of power integrity: sufficiency, efficiency, and stability; and implements chip/package/board co-design flows for system power designs.
机译：近年来，随着设计向具有高电流容量和高数据速率的低压系统发展，为高速数字系统设计最佳电源方案已成为一项巨大的挑战。设计人员今天面临的基本问题是如何通过印刷电路板（PCB）和封装为芯片上的核心电路和IO有效地提供充足且稳定的电源。为了在低压系统中实现这样的设计目标，必须在整个输电网络上设计和实现低阻抗路径，即，必须在设计预算内将封装和PCB上的功耗降至最低并加以控制。完整性（PI），充足性，效率和稳定性方面。它强调IC设计人员需要意识到，如果不仔细分析和管理封装和板上的功耗，低功耗设备将无法正常工作。然后，本文介绍了如何使用IC /封装/电路板协同设计方法设计，建模，分析和验证电源传输系统（PDS）。最后，它演示了可感知封装的IC电源设计，可感知芯片的封装/电路板电源设计以及系统电源交付验证的协同设计和协同仿真流程。利用所提出的流程，设计人员能够通过修改芯片，封装或电路板设计来识别和解决电源输送问题，从而在低压系统中实现足够，高效和稳定的电源。rn本文从电源完整性的三个基本方面入手。 ：充分，高效和稳定；并为系统电源设计实现芯片/封装/板子协同设计流程。

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