Implementation of Jacobi iterative solver in verilog HDL

机译：Verilog HDL中Jacobi迭代求解器的实现

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摘要

There are many engineering simulations and scientific computing applications where large linear system of equations are to be solved. With the generous development in scientific computing the use of large linear system of equations also increases. There are many solvers for solving these equations. Jacobi is one of the important solvers for solving linear system of equations. Jacobi method is more efficient when implemented in a pipelined manner in an FPGA and it also shows more parallelism In this paper hardware based implementation of Jacobi solver is discussed. The main idea of Jacobi to obtain preference is its computation that can be trivially done in parallel.

机译：在许多工程仿真和科学计算应用中，需要解决大型线性方程组。随着科学计算的蓬勃发展，大型线性方程组的使用也增加了。有很多求解器可以求解这些方程。 Jacobi是解决线性方程组的重要求解器之一。 Jacobi方法在FPGA中以流水线方式实现时效率更高，并且还显示出更多的并行性。本文讨论了基于硬件的Jacobi求解器实现。 Jacobi获得偏好的主要思想是可以并行进行琐碎的计算。

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《International Conference on Control, Instrumentation, Energy Communication》|2016年|103-105|共3页
会议地点 Kolkata(IN)
作者
Manashwi Tamuli; Shreyasee Debnath; Ashok Ray; Swanirbhar Majumdar;
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Electronics and Communication Engineering department North Eastern Regional Institute of Science Technology Nirjuli Arunachal Pradesh India;

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Field Programmable Gate Array (FPGA); Gauss-Seidel; Graphics Processing Unit (GPU); Jacobi; Successive over relaxation (SOR);

机译：现场可编程门阵列（FPGA）；高斯·赛德尔图形处理单元（GPU）；雅可比连续放松（SOR）;

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机译：Jacobi本征求解器的功能实现

Implementation of Jacobi iterative solver in verilog HDL

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