Semi-systolic Architecture for Modular Multiplication over GF(2~m)

机译：GF（2〜m）上模乘的半收缩架构

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This paper proposes a new algorithm and an architecture for it to compute the modular multiplication over GF(2~m). They are based on the standard basis representation and use the property of irreducible all one polynomial as a modulus. The architecture, named SSM(Semi-Systolic Multiplier) has the critical path with 1-D_(AND)+1-D_(XOR) Per cell and the latency of m+1. It has a lower latency and a smaller hardware complexity than previous architectures. Since the proposed architecture has regularity, modularity and concurrency, they are suitable for VLSI implementation.

机译：本文提出了一种新的算法及其架构，用于计算GF（2〜m）上的模乘。它们基于标准的基础表示形式，并使用所有多项式的不可约性作为模量。名为SSM（半收缩期乘数）的体系结构的关键路径为每个单元1-D_（AND）+ 1-D_（XOR），延迟为m + 1。与以前的体系结构相比，它具有较低的延迟和较小的硬件复杂性。由于所提出的体系结构具有规则性，模块化和并发性，因此它们适用于VLSI实现。

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来源
《International Conference on Computational Science(ICCS 2005) pt.3; 20050522-25; Atlanta, GA(US)》|2005年|P.912-915|共4页
会议地点 Atlanta GA(US)
作者
Hyun-Sung Kim; Il-Soo Jeon;
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Kyungil University, School of Computer Engineering, 712-701, Kyungsansi, Kyungpook Province, Korea;

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原文格式 PDF
正文语种 eng
中图分类理论、方法;
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1. Low Power Semi-systolic Architectures for Polynomial-Basis Multiplication over GF(2(m)) Using Progressive Multiplier Reduction [J] . Ibrahim Atef, Gebali Fayez Journal of VLSI signal processing systems for signal, image, and video technology . 2016,第3期

机译：使用渐进乘数归约法在GF（2（m））上进行多项式基础乘法的低功耗半收缩架构
2. Low-Power, High-Speed Unified and Scalable Word-Based Radix 8 Architecture for Montgomery Modular Multiplication in GF(P) and GF(2n nn ) [J] . Atef Ibrahim, Hamed Elsimary, Fayez Gebali Arabian Journal for Science and Engineering . 2014,第11期

机译：用于GF（P）和GF（2n nn）中的蒙哥马利模乘的低功耗，高速，统一且可扩展的基于词的Radix 8架构
3. Low Space Complexity, High performance Unified and Scalable Word-Based Radix 4 Architecture for Montgomery Modular Multiplication in GF(P) and GF(2~k) [J] . ATEF IBRAHIM WSEAS Transactions on Circuits and Systems . 2014,第Null期

机译：用于GF（P）和GF（2〜k）中蒙哥马利模乘的低空间复杂度，高性能，统一且可扩展的基于单词的Radix 4架构
4. Semi-systolic Architecture for Modular Multiplication over GF(2~m) [C] . Hyun-Sung Kim, Il-Soo Jeon International Conference on Computational Science . 2005

机译：半收缩架构用于GF的模块化倍增（2〜M）
5. A novel unified algorithm and hardware architecture for integrated modular division and multiplication in GF(p) and GF(2n) suitable for public-key cryptography. [D] . Tawalbeh, Lo'ai Ali. 2004

机译：适用于公钥密码学的GF（p）和GF（2n）中集成模块化除法和乘法的新颖的统一算法和硬件体系结构。
6. Parallel point-multiplication architecture using combined group operations for high-speed cryptographic applications [O] . Md Selim Hossain, Ehsan Saeedi, Yinan Kong -1

机译：使用组合组运算的并行点乘法架构用于高速密码应用
7. Efficient parallel semi-systolic array structure for multiplication and squaring in GF(2m) [O] . Atef Ibrahim, Usman Tariq, Tariq Ahmad, 2019

机译：高效并行半收缩阵列结构，用于GF中的倍增和平方（2 m ）

Semi-systolic Architecture for Modular Multiplication over GF(2~m)

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