首页> 外文会议>International Conference on Signal Processing(ICSP'06); 20061116-20; Guilin(CN) >Parallel Testing of Phase-Locked Loop Lock Time In Production
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Parallel Testing of Phase-Locked Loop Lock Time In Production

机译:生产中锁相环锁定时间的并行测试

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摘要

Methods to accurately measure Phase-locked loop lock time in multisite production environment has been presented and explained. The methods are applicable for testing transceiver frequency settling times, and frequency and phase errors after settling for multiple devices under test in parallel using on board frequency mixers and RF signal generators or using RF receivers of automated testers. Inverse FFT was used to measure the PLL lock time in a case when PLL frequency error exists.
机译:提出并解释了在多站点生产环境中准确测量锁相环锁定时间的方法。该方法适用于使用板载混频器和RF信号发生器或使用自动测试仪的RF接收器并行测试多个被测设备后,测试收发器的频率稳定时间以及频率和相位误差。在存在PLL频率误差的情况下,使用逆FFT来测量PLL锁定时间。

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