• 主题
高级搜索  >
历史搜索 清空历史
首页> 外文会议>International Euro-Par Parallel Processing Conference; 20050830-0902; Lisbon(PT) >Instruction Recirculation: Eliminating Counting Logic in Wakeup-Free Schedulers
【24h】

Instruction Recirculation: Eliminating Counting Logic in Wakeup-Free Schedulers

机译：指令再循环：消除无唤醒调度程序中的计数逻辑

获取原文
获取原文并翻译 | 示例
页面导航
  • 摘要
  • 著录项
  • 相似文献
  • 相关主题

摘要

The dynamic instruction scheduling logic (the issue queue and the associated control logic) forms the core of an out-of-order microprocessor. Traditional scheduling mechanisms, based on tag broadcasts and associative tag matching logic within the issue queue are limited by high power consumption, large access delay and poor scalability. To address these inefficiencies, researchers have proposed various flavors of so-called wakeup-free scheduling logic. Such wakeup-free scheduling techniques remove the wakeup delay from the critical path, but incur other forms of complexity, essentially stemming from the need to keep track of the cycle when each physical register will become ready and when each instruction can be (speculatively) issued. We propose instruction recirculation - a wakeup-free instruction scheduler design that completely eliminates all counting and issue time estimation logic inherent in all previously proposed wakeup-free schedulers. This complexity reduction is also accompanied by 3.6% IPC improvement over the state-of-the-art wakeup-free scheduler.
机译：动态指令调度逻辑（发布队列和相关的控制逻辑）构成了乱序微处理器的核心。基于标签广播和发布队列内相关标签匹配逻辑的传统调度机制受到高功耗，大访问延迟和差的可伸缩性的限制。为了解决这些低效率问题，研究人员提出了各种形式的所谓的无唤醒调度逻辑。这种无唤醒的调度技术消除了关键路径的唤醒延迟，但是会引起其他形式的复杂性，这主要是由于需要跟踪每个物理寄存器何时准备就绪以及何时（推测地）发出每条指令的周期。我们提出指令再循环-一种无唤醒指令调度程序设计，该设计完全消除了所有先前提出的所有无唤醒调度程序固有的所有计数和发布时间估计逻辑。与最先进的无唤醒调度程序相比，这种复杂性的降低还带来了3.6％的IPC改善。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱：kefu@zhangqiaokeyan.com

京公网安备：11010802029741号 ICP备案号：京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有

  • 客服微信

  • 服务号