Electrical transport characterization of nano CMOS devices with ultra-thin silicon film

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• 来源
  《Junction Technology, 2009. IWJT 2009》|2009年|58-63|共6页
• 会议地点 Kyoto(JP);Kyoto(JP)
• 作者

  Ghibaudo G.; Mouis M.; Pham-Nguyen L.; Bennamane K.; Pappas I.; Cros A.; Bidal G.; Fleury D.; Claverie A.; Benassayag G.; Fazzini P.-F.; Fenouillet-Beranger C.; Monfray S.; Boeuf F.; Cristoloveanu S.; Skotnicki T.; Collaert N.;

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• 作者单位

  IMEP-LAHC, MINATEC/INPG, Grenoble, France;

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• 会议组织
• 原文格式 PDF
• 正文语种
• 中图分类
• 关键词

  CMOS integrated circuits; MOSFET; Monte Carlo methods; carrier mobility; elemental semiconductors; nanoelectronics; silicon; silicon-on-insulator; 2D Monte Carlo collision simulation; FD-SOI; FinFET; MOS devices; S-D implantation process; Si; channel diffusion scattering centres; double gate transistors; drain junction; electrical transport characterization; gate length dependence; low temperature measurement; mobility; nano CMOS devices; neutral point defect; short channel devices; source junction; ultrathin silicon fi;

  机译：CMOS集成电路MOSFET蒙特卡罗方法载流子迁移率元素半导体纳米电子硅绝缘体上硅二维蒙特卡洛碰撞模拟FD-SOI FinFET MOS器件SD注入工艺Si沟道扩散散射中心;双栅极晶体管;漏极结;电输运特性;栅极长度依赖性;低温测量;迁移率;纳米CMOS器件;中性点缺陷;短沟道器件;源极结;超硅薄膜;