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Architecture of an on Electrode Integrated Electronics with an All Digital Interface for Electrical Impedance Tomography

机译:具有电气阻抗断层扫描的所有数字接口的电极集成电子的体系结构

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The paper presents an architecture of an EIT system aiming to deploy on each electrode the analog part electronics aggregated in an integrated circuit. The main objective is to have outside the electrodes belt an all digital interface only. The on electrode integrated circuit as proposed incorporates all stages. The sine wave generation, D/A converter and filter, a high resistance output voltage to current converter to the associated digital communication and control on the input side. The sensing side will contribute with the differential voltage measurement module. The paper examines in detail solutions for the frequency generation module and the current generator at the output. The results of the design optimization for integration into silicon are emphasized. Future work is outlined in the conclusions.
机译:本文介绍了旨在部署在集成电路中的模拟部件电子设备的每个电极上的EIT系统的架构。主要目标是在电极带外部仅为所有数字接口。如提议的电极集成电路包含所有阶段。正弦波生成,D / A转换器和滤波器,高电阻输出电压对电流转换器到相关的数字通信和控制在输入侧。感测侧将有助于差分电压测量模块。本文在输出时的频率产生模块和电流发生器的详细解决方案中。强调设计优化的设计优化成硅。结论中概述了未来的工作。

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