• 主题
高级搜索  >
历史搜索 清空历史
首页> 外文会议>ASME international mechanical engineering congress and exposition >A HYBRID APPROACH TO INVESTIGATE EFFECT OF FLIP-CHIP PACKAGING ON RF MEMS DEVICES PERFORMANCE
【24h】

A HYBRID APPROACH TO INVESTIGATE EFFECT OF FLIP-CHIP PACKAGING ON RF MEMS DEVICES PERFORMANCE

机译：一种探讨倒装芯片包装对RF MEMS器件性能影响的混合方法

获取原文
页面导航
  • 摘要
  • 著录项
  • 相似文献
  • 相关主题

摘要

A hybrid numerical/experimental scheme to investigate the effect of flip-chip packaging, with and without underfill, on MEMS device performance will be described. Finite element analysis (FEA) is used to model the MEMS assembly and is verified with Twyman/Green (T/G) and Moire interferometry, and good agreement between FEA and optical measurements is obtained. The die warpage in assemblies with and without underfill are approximately 0.36 μm and 1.1 μm, respectively. The performance of MEMS devices, fixed-fixed beams, in the packages is characterized by Capacitance-Voltage (C-V) measurement sweeping the actuation voltage yielding the "ON" state and "OFF" state capacitances. Beams in packages without underfill exhibit good actuation behavior while beams in packages with underfill are already in the down-position after packaging. Because die warpage of packages with and without underfill are significantly different, beam anchor relative displacement (BARD), which is affected by the warpage, is used to understand the C-V performance. From numerical models, BARD of packages without underfill is 50 nm and 162 nm for packages with underfill. Compared to a simplified critical BARD calculation (BARD_(crit) = 57 nm), the large BARD of packages with underfill implies that beams may have buckled, which results in the poor C-V performance. Further modeling of varied die thicknesses and coefficients of thermal expansion (CTE) of the underfill shows that the reduction of BARD is limited because of strong underfill-induced coupling between the die and substrate. It is concluded that the MEMS device and package have to be considered as a coupled design problem to minimize the adverse packaging effect on MEMS devices.
机译：将描述用于研究倒装芯片包装，在MEMS器件性能的倒装芯片包装的效果的混合数值/实验方案。有限元分析（FEA）用于模拟MEMS组件，并用TWYMAN / GREEN（T / G）和MOIER干涉测量验证，并且获得了FEA和光学测量之间的良好一致性。具有底部底部的组件中的模具翘曲分别为约0.36μm和1.1μm。 MEMS器件，固定梁的性能，在封装中的特征在于电容 - 电压（C-V）测量扫描致动电压，产生“ON”状态和“OFF”状态电容。包装中的横梁没有底部填充物呈现出良好的致动行为，而在包装后的底部填充物中的横梁已经处于下位。由于具有和无底部填充的包装的模具翘曲显着不同，因此使用受翘曲影响的梁锚相对位移（Bard）用于了解C-V性能。根据数值模型，底部填充的套餐的套餐的套餐是50nm和162 nm。与简化的批判性吟族计算（BARD_（CRIT）= 57nm）相比，具有底部填充的大型套餐暗示光束可能会弯曲，这导致C-V性能差。底部填充的变化模具厚度和热膨胀系数（CTE）的进一步建模表明，由于模具和基板之间的强底部填充耦合，因此吟游诗的减少是有限的。结论是MEMS装置和包装必须被认为是耦合设计问题，以最大限度地减少对MEMS器件的不利包装效应。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱：kefu@zhangqiaokeyan.com

京公网安备：11010802029741号 ICP备案号：京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有

  • 客服微信

  • 服务号