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首页> 外文会议>Image and Video Communications and Processing 2003 >Multi-Resolution Block Matching Algorithm and its LSI Architecture for Fast Motion Estimation in MPEG-2 Video Encoder
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Multi-Resolution Block Matching Algorithm and its LSI Architecture for Fast Motion Estimation in MPEG-2 Video Encoder

机译：MPEG-2视频编码器中用于快速运动估计的多分辨率块匹配算法及其LSI架构

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This paper proposes a fast multi-resolution block-matching algorithm (MRBMA) for MPEG-2 video encoding, which satisfies high estimation performance and efficient LSI implementation. MRBMA is based on the characteristic that field motion vector's (MV's) are very close to its corresponding frame MV. Firstly, MRBMA performs frame-based motion estimation (ME) as follows: At the coarsest level, two MV candidates are found on the basis of minimum matching error for the next level search. The two MV candidates from the coarsest level search and the other one based on spatial MV correlation are used as center points for three local searches at the middle level. At the finest level, a frame MV is obtained from a local search around a single candidate from the middle level search. Field MV's are estimated with the single MV candidate from the middle level search of frame ME as initial estimates at the finest level, without any coarser level searches. This paper also describes a VLSI architecture based on MRBMA. This architecture is optimized to provide a good tradeoff between on-chip memory size and I/O bandwidth with high throughput. We implemented this architecture with about 140K gates and 25K bytes SRAM for a large search range of [-192.0, +191.5] by using a synthesizable Verilog HDL.
机译：本文提出了一种用于MPEG-2视频编码的快速多分辨率块匹配算法（MRBMA），该算法满足了较高的估计性能和有效的LSI实现。 MRBMA基于场运动矢量（MV）非常接近其对应帧MV的特性。首先，MRBMA如下执行基于帧的运动估计（ME）：在最粗糙的级别上，基于最小匹配误差为下一级搜索找到两个MV候选对象。来自最粗糙级别搜索的两个MV候选对象和另一个基于空间MV相关性的MV候选对象用作中间级别的三个局部搜索的中心点。在最好的水平上，从围绕中间水平搜索的单个候选者的局部搜索中获得帧MV。场MV的估计是使用帧ME的中间层搜索中的单个MV候选值作为最佳级别的初始估计，而不进行任何更粗糙的搜索。本文还描述了基于MRBMA的VLSI体系结构。该体系结构经过优化，可在片上存储器大小和I / O带宽之间以高吞吐量实现良好的折衷。我们通过使用可综合的Verilog HDL，在大约[-192.0，+191.5]的较大搜索范围内实现了具有约140K门和25K字节SRAM的该体系结构。

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