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首页> 外文会议>Annual Conference of the IEEE Industrial Electronics Society >A New Asymmetrical Cascaded Multilevel Inverter with Reduced Number of Components
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A New Asymmetrical Cascaded Multilevel Inverter with Reduced Number of Components

机译：一种新的非对称级联多级逆变器，减少了组件数量

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摘要

Multilevel inverters (MLIs) are known as one of the most widely used power converters in power electronic fields. This study proposes a new voltage source inverter (VSI) for MLI with reduced number of components. The recommended MLI is implemented with 8 DC links and 18 switches, which generates 33 output voltage levels in asymmetric source configuration. All voltage levels (positive, negative and zero) are synthesized at the output terminals without any additional circuit. Cascaded connection of the topology is also proposed. Compared with other conventional and recently invented topologies, it uses less number of components. The accuracy performance of the suggested MLI in synthesizing the positive, negative and also zero voltage levels is verified over the simulation results (MATLAB/SIMULINK software) on a 33-level inverter.
机译：多级逆变器（MLIS）被称为电力电子字段中最广泛使用的电源转换器之一。本研究提出了用于MLI的新电压源逆变器（VSI），其数量减少。推荐的MLI用8个直流链路和18个开关实现，在不对称源配置中产生33个输出电压电平。在没有任何额外电路的输出端子处合成所有电压电平（正极，负和零）。还提出了拓扑结构的级联连接。与其他传统和最近发明的拓扑相比，它使用少量组件。在33电平逆变器上通过仿真结果（MATLAB / SIMULINK SOWARE）来验证建议的MLI的精度性能，在33级逆变器上验证了仿真结果（MATLAB / SIMULINK SOWARE）。

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