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Ultrahigh speed transceiver package with stacked silicon integration technology

机译:采用堆叠式硅集成技术的超高速收发器封装

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As carrier frequency going into millimeter wave domain, today's semiconductor IC package enters a domain where many challenges become fundamental to legacy technology and design practice. In this study, we analyze interconnect impairment for ultrahigh speed transceivers. To answer the challenge towards 56Gbps, we assess system compensation schemes from silicon equalization to passive interconnect innovations. The author will specifically address recent advancement in stacked silicon integration technology (SSIT) and its role in 400G/1TB system solutions.
机译:随着载波频率进入毫米波领域,当今的半导体IC封装进入了一个领域,在该领域中,许多挑战已成为传统技术和设计实践的基础。在这项研究中,我们分析了超高速收发器的互连损耗。为了应对56Gbps的挑战,我们评估了从硅均衡到无源互连创新的系统补偿方案。作者将特别介绍堆叠硅集成技术(SSIT)的最新进展及其在400G / 1TB系统解决方案中的作用。

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