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首页> 外文会议>International Conference on Reliability, Infocom Technologies and Optimization >A simulation technique to test on board software — EEPROM hardware interface using SILS facility
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A simulation technique to test on board software — EEPROM hardware interface using SILS facility

机译：一种用于测试板载软件的仿真技术-使用SILS工具的EEPROM硬件接口

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ISRO Satellite Centre (ISAC) is the lead centre for development and operationalisation of communication, remote sensing and interplanetary missions. These satellites contain highly advanced embedded systems carrying out critical operations thus achieving mission goals. In the ISRO's current generation of spacecrafts, as autonomy taking the centre stage, complexity of spacecrafts have increased manifold. Attitude and Orbit Control Electronics (AOCE), is one of the main subsystems where most of the autonomy features are implemented. To handle autonomy functionalities, Electrically Erasable and Programmable Read Only Memory Management (EEPROM) is interfaced with AOCE On board software. On-board autonomy functions use data and logics stored in EEPROM memory via onboard software. Testing these interface logics had an inherent constraint in performing number of write operations on EEPROM device[1]. Overcoming this limitation and performing exhaustive testing of autonomy and EEPROM interface logics was a challenge. Simulation based test facility was already established to test all on-board software functionalities. Hence, EEPROM memory device had to be simulated and interfaced with this test facility, in order to test on-board autonomy functions. In addition, along with EEPROM, other memory devices like, Storage Random Access Memory (RAM) and Programmable Read Only Memory (PROM) are used for various critical functionalities. Having a device specific simulation model for EEPROM, Storage RAM and Programmable Read Only Memory (PROM) although technically feasible, lacks software reusability, thereby increasing development and testing time. To make the memory controller simulation more generic and reusable object oriented methodology was used [2]. The design model described in the rest of the paper provides an overview of the same. This paper focuses, mainly on the design methodology used to simulate EEPROM as a case study. This paper also discusses in brief the results obtained by testing using this simulation technique and advantages reaped from the same.
机译：ISRO卫星中心（ISAC）是通信，遥感和星际飞行任务开发和运行的牵头中心。这些卫星包含执行关键操作的高度先进的嵌入式系统，从而实现了任务目标。在ISRO的新一代航天器中，以自主性为中心，航天器的复杂性日益增加。姿态和轨道控制电子设备（AOCE）是实现大多数自治功能的主要子系统之一。为了处理自主功能，将电可擦可编程只读存储器管理（EEPROM）与AOCE On board软件连接。板载自治功能使用通过板载软件存储在EEPROM存储器中的数据和逻辑。测试这些接口逻辑对于在EEPROM器件上执行许多写操作具有固有的局限性[1]。克服这一限制，并对自治性和EEPROM接口逻辑进行详尽的测试是一个挑战。已经建立了基于仿真的测试设施来测试所有机载软件功能。因此，必须对EEPROM存储设备进行仿真并与该测试设备连接，以测试板载自治功能。此外，与EEPROM一起，其他存储设备（如存储随机存取存储器（RAM）和可编程只读存储器（PROM））也用于各种关键功能。尽管在技术上可行，但具有适用于EEPROM，存储RAM和可编程只读存储器（PROM）的特定于设备的仿真模型，却缺乏软件的可重用性，从而增加了开发和测试时间。为了使存储器控制器仿真更加通用和可重用的面向对象方法被使用[2]。本文其余部分描述的设计模型对此进行了概述。本文主要关注案例仿真中用于模拟EEPROM的设计方法。本文还简要讨论了使用这种模拟技术进行测试所获得的结果以及从中获得的好处。

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