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首页> 外文会议>International Symposium on Computer Architecture and High Performance Computing Workshop >Synchronization-Free Automatic Parallelization for Arbitrarily Nested Affine Loops
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Synchronization-Free Automatic Parallelization for Arbitrarily Nested Affine Loops

机译：任意嵌套的仿射循环的免同步自动并行化

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摘要

This paper presents a new approach for extracting synchronization-free parallelism available in program loop nests. The approach allows for extracting parallelism for arbitrarily nested parametric loop nests, where the loop bounds and data accesses are affine functions of loop indices and symbolic parameters. Parallelization is realized using the transitive closure of a dependence graph. Speed-up of parallel code produced by means of the approach is studied using the NAS benchmark suite. Parallelism of loop nests is obtained by creating a kernel of computations represented in the OpenMP standard to be executed independently on multi-core computers. Results of an experimental study carried out by means of the many integrated core architecture Intel Xeon Phi is discussed.
机译：本文提出了一种提取程序循环嵌套中可用的无同步并行性的新方法。该方法允许为任意嵌套的参数循环嵌套提取并行度，其中循环边界和数据访问是循环索引和符号参数的仿射函数。使用依赖图的传递闭包可实现并行化。使用NAS基准套件研究了通过这种方法产生的并行代码的速度。通过创建OpenMP标准中表示的要在多核计算机上独立执行的计算内核，可以实现循环嵌套的并行性。讨论了通过许多集成核心架构Intel Xeon Phi进行的实验研究的结果。

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