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Low voltage Flash memory design based on floating gate SOFFET

机译：基于浮栅缝合的低压闪存设计

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摘要

Flash memory is widely used, especially for mobile applications, as nonvolatile memory storage. In this paper, we present a Flash memory design based on Silicon on Ferroelectric-Insulator FET (SOFFET) device. This device has shown tremendous potential for various ultra-low-power (ULP) applications. SOFFET has the potential to provide high performance, multi-VT design, strong threshold voltage control, low voltage operation, and below 60mV/decade subthreshold swing. The proposed approach utilizes conventional floating gate on SOI architecture with an additional ferroelectric insulator layer. The threshold voltage of the device is influenced by the charge accumulation on the floating gate as well as a control voltage. Due to the ferroelectric layer which allows the formation of negative capacitance effect inside a transistor, the presented Flash memory cell can be turned at a lower electric field. As a result, both program and erase operations can be performed at a lower voltage, making it ideal for low-power application. Moreover, the proposed Flash memory is compatible with conventional SOI fabrication process with minor adjustment.
机译：闪存广泛使用，特别是对于移动应用，作为非易失性存储器存储器。在本文中，我们在铁电绝缘体FET（Soffet）装置上基于硅呈闪存设计。该设备对各种超低功耗（ULP）应用具有巨大的潜力。 Soffet有可能提供高性能，多VT设计，强阈值电压控制，低电压操作等，低于60mV /十年亚阈值摆幅。该方法利用具有额外的铁电绝缘层的SOI架构上的传统浮动栅极。器件的阈值电压受浮栅上的电荷累积的影响以及控制电压。由于允许在晶体管内形成负电容效应的铁电层，所示的闪存单元可以在较低电场处转动。结果，可以以较低的电压执行程序和擦除操作，使其成为低功率应用的理想选择。此外，所提出的闪存与具有微小调整的传统SOI制造过程兼容。

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