High-Q 3D-IPD Diplexer with High Aspect Ratio Cu Pillar Inductor

机译：具有高纵横比的Cu柱电感的高Q 3D IPD双工器

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In this paper, a high quality factor 3D-inductor has been demonstrated by 3D-IPD solution with tall Cu pillar. It can achieve ~7:1 aspect ratio vertical connection without expensive TSV or TGV process, and meet the demand of high quality value wafer level process. A maximum quality factor of 60-80 has been achieved for 3D inductors in this study. Moreover, the proposed structure has been adopted to RF diplexer design with 1.0mm*0.5mm size for WiFi applications. The result shows a great performance improvement of lower insertion loss (0.31dB and 0.70dB) and larger attenuation (28dB and 26dB) than 2DIPD diplexer. Based on the measurement result, the proposed high aspect ratio tall Cu pillar technology has been verified on RF inductors and IPD diplexer, demonstrates good performance, and is a significant promise for commercial wireless radio system.

机译：本文通过具有高铜柱的3D-IPD解决方案证明了高品质因数3D电感器。它无需昂贵的TSV或TGV工艺即可实现约7：1长宽比的垂直连接，并满足高质量价值晶圆级工艺的需求。在这项研究中，3D电感器的最高品质因数已达到60-80。而且，所提出的结构已经被用于尺寸为1.0mm * 0.5mm的RF双工器设计用于WiFi应用。结果表明，与2DIPD双工器相比，插入损耗较低（0.31dB和0.70dB），衰减较大（28dB和26dB）时，性能得到了很大的改善。根据测量结果，提出的高深宽比高的Cu柱技术已经在RF电感器和IPD双工器上得到了验证，具有良好的性能，对于商用无线电系统具有重要的前景。

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《Electronic System-Integration Technology Conference》|2018年|1-5|共5页
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Sheng-Chi Hsieh; Cheng-Yuan Kung; Teck Chong Lee; Hung-Yi Lin; Pao-Nan Lee; Chen-Chao Wang;
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Inductors; Three-dimensional displays; Radio frequency; Inductance; Two dimensional displays; Wireless fidelity; Insertion loss;

机译：电感器;三维显示器;射频;电感;二维显示器;保真度;插入损耗;

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1. Low-K/Cu CMOS-Based SoC Technology With 115-GHz f{sub}T, 100-GHz f{sub}(max), Low Noise 80-nm RF CMOS, High-Q MiM Capacitor, and Spiral Cu Inductor [J] . Jyh-Chyurn Guo IEEE Transactions on Semiconductor Manufacturing . 2006,第3期

机译：基于低K / Cu CMOS的SoC技术，具有115GHz f {sub} T，100GHz f {sub}（max），低噪声80nm RF CMOS，高Q MiM电容器和螺旋Cu电感器
2. A High-Q In-Silicon Power Inductor Designed for Wafer-Level Integration of Compact DC–DC Converters [J] . Jiping Li, Victor Farm-Guoo Tseng, Zhiming Xiao, IEEE Transactions on Power Electronics . 2017,第5期

机译：专为紧凑型DC-DC转换器的晶圆级集成而设计的高Q硅功率电感器
3. Preparation of M~0 metal/alumina-pillared mica composites (M = Cu, Ni) by in situ reduction of interlayer M~(2+) ions of alumina-pillared fluorine micas [J] . Tomohiro Yamaguchi, Seiichi Taruta, Tomohiko Yamakami, Materials Research Bulletin . 2007,第12期

机译：通过原位还原氧化铝柱状氟云母的层间M〜（2+）离子制备M〜0金属/氧化铝柱状云母复合材料（M = Cu，Ni）
4. High-Q 3D-IPD Diplexer with High Aspect Ratio Cu Pillar Inductor [C] . Sheng-Chi Hsieh, Cheng-Yuan Kung, Teck Chong Lee, Electronics System Integration Technology Conference . 2018

机译：高Q 3D-IPD双工器，具有高纵横比Cu柱电感器
5. High-Q three-dimensional inductors and transformers for high frequency applications. [D] . Weon, Dae Hee. 2007

机译：适用于高频应用的高Q三维电感器和变压器。
6. Analysis of the Failure and Performance Variation Mechanism of MEMS Suspended Inductors with Auxiliary Pillars under High-g Shock [O] . Lixin Xu, Yiyuan Li, Jianhua Li 2020

机译：高G震动下辅助柱的MEMS悬浮电感器故障和性能变化机制分析
7. Low-Loss, High-Q Spiral Inductor for Wafer Level CSP Using Cu Interconnect Technology with Polyimide Isolation Layer. [O] . Yutaka AOKI, Yoshio KAMI, Kazuhiko HONJO 2004

机译：使用Cu互连技术与聚酰亚胺隔离层的晶圆级CSP的低损耗，高Q螺旋电感器。

High-Q 3D-IPD Diplexer with High Aspect Ratio Cu Pillar Inductor

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