A High Resolution ADC Model Combined Pipeline and Sigma -Delta Oversampling Architecture

机译：结合流水线和Sigma-Delta过采样结构的高分辨率ADC模型

获取原文

页面导航

摘要
著录项
相似文献
相关主题

摘要

Data acquisition system is a key instrument to convert analog signals to digital signals in geophysics. To match high resolution sensors in seismometers systems, high resolution analog-digital conversion (ADC) is deployed in data acquisition system. Class

机译：数据采集系统是地球物理中将模拟信号转换为数字信号的关键设备。为了匹配地震仪系统中的高分辨率传感器，在数据采集系统中部署了高分辨率模数转换（ADC）。班

著录项

来源
《IEEE International Conference on Cognitive Informatics and Cognitive Computing》|2019年|1 v.|共6页
会议地点
作者
Wei Ding; Tao Wu; Chengwang Liao; Jing Wang; Yong Jiang;
展开▼
作者单位

展开▼
会议组织
原文格式 PDF
正文语种
中图分类计算技术、计算机技术;
关键词
Analog-digital conversion (ADC); Σ-Δ modulation; pipeline; noise analysis; architecture;

机译：模数转换;∑-Δ调制;管道噪声分析;建筑学;

相似文献

外文文献
中文文献
专利

1. New Feedback Architecture for VCO-Based Delta-Sigma ADCs Utilizing Phase Shifter [J] . Ali Mohammadi, Ahmad Ayatollahi, Adib Abrishamifar 电子科技学刊：英文版 . 2012,第003期
2. Novel Design for High Speed and Resolution Delta-sigma A/D Converter [J] . TANG Sheng-xue, HE Yi-gang, GUO Jie-rong, 半导体光子学与技术（英文版） . 2007,第001期
3. A Reduced-Sample-Rate Sigma-Delta-Pipeline ADC Architecture for High-Speed High-Resolution Applications [J] . Vahid MAJIDZADEH, Omid SHOAEI IEICE Transactions on Electronics . 2006,第6期

机译：适用于高速高分辨率应用的降低采样率的Sigma-Delta-管道ADC架构
4. A 90-dB SNR 2.5-MHz output-rate ADC using cascaded multibit delta-sigma modulation at 8/spl times/ oversampling ratio [J] . Fujimori I., Longo L. IEEE Journal of Solid-State Circuits . 2000,第12期

机译：采用级联多位delta-sigma调制的8dB / spl次/过采样率的90dB SNR 2.5MHz输出速率ADC
5. A low oversampling ratio 14-b 500-kHz /spl Delta//spl Sigma/ ADC with a self-calibrated multibit DAC [J] . Baird R.T., Fiez T.S. IEEE Journal of Solid-State Circuits . 1996,第3期

机译：具有自校准多位DAC的低过采样率14-b 500kHz / spl Delta // spl Sigma / ADC
6. A High Resolution ADC Model Combined Pipeline and Sigma -Delta Oversampling Architecture [C] . Wei Ding, Tao Wu, Chengwang Liao, IEEE International Conference on Cognitive Informatics and Cognitive Computing . 2019

机译：结合管线和Sigma-Delta过采样架构的高分辨率ADC模型
7. Design and realization of a single stage sigma-delta ADC with low oversampling ratio. [D] . Cheng, Yongjie. 2006

机译：低过采样率的单级sigma-delta ADC的设计与实现。
8. Low Power CMOS-Based Hall Sensor with Simple Structure Using Double-Sampling Delta-Sigma ADC [O] . Ju Yong Lee, Younggyun Oh, Sein Oh, 2020

机译：低功耗CMOS的霍尔传感器结构简单使用双取样Delta-Sigma ADC
9. Design and Modelling of a High Resolution, Continuous-Time Delta-Sigma ADC: In-depth noise considerations and optimization [O] . Rypestøl Lars 2011

机译：高分辨率，连续时间Δ-ΣADC的设计和建模：深入的噪声考虑和优化
10. GaAs Sigma-Delta Modulator Modeling for Analog to Digital Converters (ADCS) [R] . Mahurin, E., Siford, R. 1992

机译：用于模数转换器的Gaas sigma-Delta调制器建模（aDCs）

A High Resolution ADC Model Combined Pipeline and Sigma -Delta Oversampling Architecture

摘要

著录项

相似文献

相关主题

期刊订阅