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Efficient Scalable Three Operand Multiplier Over GF(2^m) Based on Novel Decomposition Strategy

机译：基于新型分解策略的GF（2 ^ m）有效可扩展三操作数乘法器

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摘要

It is expected that efficient scalable three operand multiplier (STOM) over GF(2m) (polynomial basis) generally can provide quite a number of superior benefits such as low-complexity and flexibility on processing bits and thus is very ideal to many applications like elliptic curve cryptography and pairing cryptography. The actual efficient hardware implementation of STOM, however, is still not covered in the literature. Based on this consideration, in this paper, we propose a novel decomposition strategy based design scheme to obtain efficient STOM on hardware platforms. First of all, a novel decomposition strategy (summarized as Toeplitz Matrix Oriented Karatsuba Algorithm, TMOKA) based STOM is presented with detailed mathematical derivation. Then, the proposed STOM structure is introduced along with a number of optimization techniques. Finally, the complexity analysis and comparison have been given to confirm the efficiency of the proposed STOM, e.g., the proposed structure with scalable digit-size of 64 has at least 50.8% less area-delay product (ADP) than the TOM employing a newly reported finite field multiplier ([8]) on the FPGA platform. The proposed STOM can thus be extended and employed in many cryptographic applications.
机译：预期在GF（2）上有效的可扩展三操作数乘法器（STOM） m （多项式）通常可以提供相当多的优越性，例如低复杂度和处理位的灵活性，因此对于诸如椭圆曲线密码学和配对密码学之类的许多应用程序来说是非常理想的。但是，文献中仍未涵盖STOM的实际有效硬件实现。基于此考虑，本文提出了一种基于分解策略的新颖设计方案，以在硬件平台上获得有效的STOM。首先，提出了一种基于STOM的新颖分解策略（概括为面向Toeplitz矩阵的Karatsuba算法，TMOKA），并提供了详细的数学推导。然后，介绍了所建议的STOM结构以及许多优化技术。最后，进行了复杂性分析和比较，以确认所建议的STOM的效率，例如，所建议的具有64位可缩放数字大小的结构比采用新方法的TOM至少少50.8％的面积延迟乘积（ADP）。在FPGA平台上报告了有限域乘法器（[8]）。所提出的STOM因此可以被扩展并用于许多密码应用中。

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