• 主题
高级搜索  >
历史搜索 清空历史
首页> 外文会议>International Conference on Mixed Design of Integrated Circuits and Systems >HARDWARE FAULT TOLERANCE IMPLEMENTED IN SOFTWARE AT THE COMPILER LEVEL WITH SPECIAL EMPHASIS ON ARRAY-VARIABLE PROTECTION
【24h】

HARDWARE FAULT TOLERANCE IMPLEMENTED IN SOFTWARE AT THE COMPILER LEVEL WITH SPECIAL EMPHASIS ON ARRAY-VARIABLE PROTECTION

机译：在编译器级别在软件中实现的硬件容错，具有特殊强调数组 - 变量保护

获取原文
页面导航
  • 摘要
  • 著录项
  • 相似文献
  • 相关主题

摘要

Advanced and sophisticated microprocessor-based systems are often applied in safety or mission critical subsystems. The problem of designing radiation-tolerant devices becomes very important, especially in places such as accelerators and synchrotrons, where the results of the experiments depend on the reliability of control mechanisms. In this paper, we propose a new technique for safe and reliable computing in the presence of radiation-induced errors. In our solution, Software Implemented Hardware Fault Tolerance (SIHFT) algorithms are implemented automatically during the compilation process. This approach makes it possible to use standard optimization algorithms during the compilation. In addition, a responsibility for implementing fault tolerance is transferred to the compiler and it is transparent to the programmers. Special emphasis has been placed on the array protection algorithm.
机译：先进和复杂的微处理器的系统通常适用于安全或关键任务子系统。设计辐射耐受装置的问题变得非常重要，特别是在诸如加速器和同步调节的地方，实验结果取决于控制机构的可靠性。在本文中，我们提出了一种在辐射引起的误差存在下安全可靠的计算的新技术。在我们的解决方案中，在编译过程中，软件实现的硬件容错（SIHFT）算法自动实现。这种方法可以在汇编期间使用标准优化算法。此外，对实现容错容差的责任被传送到编译器，并且对程序员来说是透明的。特殊重点放在阵列保护算法上。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱：kefu@zhangqiaokeyan.com

京公网安备：11010802029741号 ICP备案号：京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有

  • 客服微信

  • 服务号