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Thread shuffling: Combining DVFS and thread migration to reduce energy consumptions for multi-core systems

机译：线程改组：将DVFS和线程迁移相结合，以减少多核系统的能耗

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摘要

In recent years, multi-core systems have become mainstream in computer industry. The design of multi-cores takes advantage of thread-level parallelism in emerging applications that are computationally intensive and highly parallel. Energy efficiency is one of the biggest challenges in the design of multi-core systems, and workload imbalance among parallel threads is one of sources of energy inefficiency. Many techniques based on dynamic voltage frequency scaling (DVFS) are proposed to save energy consumptions on multi-cores, but all of them assume that each core in a multi-core system contains only one hardware context and only one thread can execute on one core at a time. However, mainstream multi-core systems are moving to have simultaneous multithreading (SMT) support in cores, and existing DVFS-based techniques are not effective to achieve maximum energy savings. In this paper, we present a novel technique called thread shuffling, which combines thread migration and DVFS to achieve maximum energy savings and maintain performance on a multi-core system supporting SMT. Thread shuffling is implemented and simulated in a cycle-accurate ×86 multi-core system. The experiments show that it achieves up to 56% energy savings without performance penalty for selected Recognition, Mining and Synthesis (RMS) applications from Intel Labs.
机译：近年来，多核系统已成为计算机行业的主流。多核的设计在计算密集型和高度并行的新兴应用程序中利用了线程级并行性。能源效率是多核系统设计中的最大挑战之一，而并行线程之间的工作负载不平衡是能源效率低下的原因之一。提出了许多基于动态电压频率缩放（DVFS）的技术来节省多核上的能耗，但是所有这些技术都假定多核系统中的每个核仅包含一个硬件上下文，并且只有一个线程可以在一个核上执行一次。但是，主流的多核系统正朝着在内核中同时支持多线程（SMT）的方向发展，而现有的基于DVFS的技术并不能有效地实现最大的节能效果。在本文中，我们提出了一种称为线程改组的新颖技术，该技术将线程迁移和DVFS相结合，以实现最大程度的节能并在支持SMT的多核系统上保持性能。线程改组是在周期精确的×86多核系统中实现和模拟的。实验表明，对于英特尔实验室精选的识别，挖掘和综合（RMS）应用，它可以节省多达56％的能源，而不会降低性能。

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