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首页> 外文会议>2011 International Conference on Wireless Communications and Signal Processing >Design of 12bit 100MHz Sample and Hold circuit for pipeline ADC
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Design of 12bit 100MHz Sample and Hold circuit for pipeline ADC

机译：流水线ADC的12bit 100MHz采样保持电路设计

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In this paper, design methods of Sample and Hold (S/H) circuit are discussed and gm/id method in OTA (Operational Transconductance Amplifiers) design is applied. Based upon the discussion, circuit design develops from the signal modeling, which would make circuit design concisely and easily. This work is elaborated in details by TSMC 0.18μm CMOS process. Folding telescope structure is applied for main OTA design, with two gain-boost OPAMPs, in order to achieve high gain and high GBW. In this paper, both main OTA and gain-boost OPAMP are design in gm/id method, and obtain circuit parameters from interpolated data simulated by H-Spice and MATLAB. Post-simulation and chip measurement results show that the S/H circuit performs well.
机译：本文讨论了采样和保持（S / H）电路的设计方法，并在OTA（运算跨导放大器）设计中采用了g m / i d 方法。根据讨论，电路设计是从信号建模发展而来的，这将使电路设计简洁，容易。台积电0.18μmCMOS工艺对这项工作进行了详细阐述。折叠式望远镜结构用于主要的OTA设计，具有两个增益提升型OPAMP，以实现高增益和高GBW。本文采用g m / i d 方法设计了主要的OTA和增益升压型OPAMP，并从H-Spice和MATLAB模拟的插值数据中获得电路参数。 。后仿真和芯片测量结果表明，S / H电路性能良好。

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