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首页> 外文会议>IEEE International Symposium on Circuits and Systems >A Low Noise, Fast Pixel Readout IC Working in Single Photon Counting Mode with Energy Window Selection in 90 nm CMOS
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A Low Noise, Fast Pixel Readout IC Working in Single Photon Counting Mode with Energy Window Selection in 90 nm CMOS

机译：低噪音，在单光子计数模式下工作的低噪音，在90 nm cmos中选择能量窗口选择

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We report on the design of a prototype IC called FPDR90 dedicated for readout of hybrid pixel semiconductor detectors used for X-ray imaging applications. The FPDR90 has dimensions of 4 mm X 4 mm and was designed in CMOS 90 nm technology with 9 metal layers. The core of the IC is a matrix of 40X32 pixels with 100 (mu)m X 100 (mu)m pixel size. Each pixel contains a fast charge sensitive amplifier (CSA), a main amplifier stage, two discriminators and two 16-bit ripple counters. The data from pixel matrix are read out via a single LVDS output with 200 Mbps rate. Each pixel contains about 1800 transistors and has a static power consumption of 42 (mu)W for nominal bias condition. The effective pulse shaping for nominal bias condition is 28 ns and the equivalent noise charge is only 106 e~(-) rms (when the CSA connected to silicon pixel detector). In a high gain mode an average gain of the front-end electronics is 64 (mu)V/e~(-). The effective offset spread (at the one sigma level) from pixel to pixel and with enabled trim DAC is only 0.76 mV (calculated to the CSA input it is only 12 e~(-) rms). The maximum count rate per pixel depends on the effective CSA feedback resistance and the dead time in the front-end as low as 117 ns (paralyzable model) can be set. The FPDR90 can operate with two energy thresholds in the readout mode separate from exposure or in the continuous readout mode with both a single threshold.
机译：我们报告了用于FPDR90的原型IC的设计，专用于用于X射线成像应用的混合像素半导体检测器的读数。 FPDR90的尺寸为4 mm x 4 mm，并设计成90nm技术，具有9个金属层。 IC的核心是具有100（mu）M×100（mu）M像素尺寸的40x32像素的矩阵。每个像素包含快速充电敏感放大器（CSA），主放大器级，两个鉴别器和两个16位纹波计数器。通过具有200 Mbps速率的单个LVDS输出读出来自像素矩阵的数据。每个像素包含约1800个晶体管，并且具有42（mu）W的静态功耗，用于标称偏置条件。标称偏置条件的有效脉冲整形为28ns，并且等效噪声电荷仅是106 e〜（ - ）rms（当CSA连接到硅像素检测器时）。在高增益模式中，前端电子设备的平均增益为64（mu）v / e〜（ - ）。从像素到像素的有效偏移量（在一个ΣIGMA水平）和具有启用的修剪DAC仅为0.76 mV（计算到CSA输入，它仅为12 e〜（ - ）rms）。每个像素的最大计数率取决于有效的CSA反馈电阻和前端的死区时间可以设置为低至117 ns（瘫痪的模型）。 FPDR90可以在读出模式下使用两个能量阈值，与曝光分开或以连续读出模式以单个阈值分开。

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