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The precision voltage references for the radiation-hardened bi-FET technological process

机译:辐射硬化的Bi-FET工艺流程的精密电压基准

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The possibility of the construction of the voltage references (VR) is considered, the output voltage of which, unlike the majority of the well-known circuitry solutions, can be relatively liberally controlled and be either higher or lower than the band gap of the silicon. For these purposes the differential stage (DS) is used where the voltage power supply with negative temperature drift is connected to one of its inputs. As a result the current with negative temperature drift is formed in one arm of DR and the current with positive temperature drift is formed in another arm. When summing the currents we manage to obtain the temperature stable voltage from 0,2 V up to 3-4V at the temperature drift not worse than 10 ppm/K. Furthermore, the use of p-n-junction FETs with p-type channel in DS renders possible to achieve high radiation hardness at total dose up to 1 Mrad and neutron flux up to 1013 - 1014 n/cm2.
机译:考虑了构建参考电压(VR)的可能性,与大多数众所周知的电路解决方案不同,参考电压(VR)的输出电压可以相对自由地控制,并且可以高于或低于硅的带隙。为此,使用差分级(DS),其中具有负温度漂移的电压电源连接到其输入之一。结果,在DR的一个分支中形成了具有负温度漂移的电流,而在另一分支中形成了具有正温度漂移的电流。当对电流求和时,我们设法获得了从0.2 V到3-4V的温度稳定电压,且温度漂移不低于10 ppm / K。此外,在DS中使用具有p型沟道的p-n型结FET可以在总剂量高达1 Mrad的情况下实现高辐射硬度,在中子通量达到1013-1014 n / cm2的条件下实现高辐射强度。

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