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首页> 外文会议>China Semiconductor Technology International Conference >From the present to the future: Scaling of planar VLSI-CMOS devices towards 3D-FinFETs and beyond 10nm CMOS technologies; manufacturing challenges and future technology concepts
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From the present to the future: Scaling of planar VLSI-CMOS devices towards 3D-FinFETs and beyond 10nm CMOS technologies; manufacturing challenges and future technology concepts

机译：从现在到未来：将平面VLSI-CMOS器件扩展到3D-FinFET并超越10nm CMOS技术;制造挑战和未来技术概念

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Jan Hoentschel works for GLOBALFOUNDRIES as a Device Manager and is responsible for 28nm low power technologies. He manages an international device engineering team, which is handling several low power CMOS technologies starting from 40nm down to 28nm. Before he was working with Advanced Micro Devices and served several PD-SOI-CMOS device integrations from 130nm down to 32nm technologies for high performance microprocessors. In addition he was working within the product interaction and implementation group at AMD in Austin, TX. Jan Hoentschel is author and co-author of numerous technical papers and patents in the semiconductor field. He holds an MS and PhD in electrical engineering from the Technical University in Dresden as well as an MBA in General Management from the University of Applied Science Bielefeld. His research interests include HKMG, strain engineering, 3D FinFET device and technology concepts, lIIiV semiconductors and low power technologies on CMOS devices.
机译：Jan Hoentschel在GLOBALFOUNDRIES担任设备经理，负责28nm低功耗技术。他管理着一个国际设备工程团队，该团队正在处理从40nm到28nm的几种低功耗CMOS技术。在他与Advanced Micro Devices合作之前，他曾为高性能微处理器提供过从130nm到32nm技术的多种PD-SOI-CMOS器件集成服务。此外，他还在德克萨斯州奥斯汀市AMD的产品交互和实施小组内工作。 Jan Hoentschel是半导体领域众多技术论文和专利的作者和合著者。他拥有德累斯顿工业大学的电子工程硕士学位和博士学位，以及比勒费尔德应用科学大学的通用管理MBA。他的研究兴趣包括HKMG，应变工程，3D FinFET器件和技术概念，IIV半导体以及CMOS器件上的低功耗技术。

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