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首页> 外文会议>IEEE International Electron Devices Meeting >A new ruler on the storage market: 3D-NAND flash for high-density memory and its technology evolutions and challenges on the future
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A new ruler on the storage market: 3D-NAND flash for high-density memory and its technology evolutions and challenges on the future

机译：存储市场的新标尺：用于高密度存储器的3D-NAND闪存及其技术演进和未来挑战

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摘要

Scaling limitations in planar-NAND cell are discussed, including the depletion of floating gate and anomalous programming behavior. It is inevitable to have a paradigm shift to 3D-NAND due to numerous scaling limitations of planar NAND. However, the process complexity also increases in 3D-NAND as the mold height goes up in an exponential trend. Thus, scaling down of mold pitch is required, which degrades the cell characteristics. COP (Cell over Peripheral) 3D-NAND architecture has been developed as an area-scaling technology. CSL (Common-Source Line) junction leakage and p+ junction leakage at peripheral transistors have been improved by increasing the grain size and the thickness of barrier metal, respectively.
机译：讨论了平面NAND单元中的缩放限制，包括浮栅的耗尽和异常编程行为。由于平面NAND的许多缩放限制，不可避免地要向3D-NAND转移。但是，随着模具高度呈指数趋势上升，3D-NAND的工艺复杂性也会增加。因此，需要缩小模具间距，这降低了电池特性。 COP（外围单元）3D-NAND体系结构已被开发为一种区域缩放技术。通过分别增加势垒金属的晶粒尺寸和厚度，可以改善外围晶体管的CSL（共源极线）结泄漏和p +结泄漏。

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