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首页> 外文期刊>Journal of nanoscience and nanotechnology >Future Prospects of NAND Flash Memory Technology - The Evolution from Floating Gate to Charge Trapping to 3D Stacking
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Future Prospects of NAND Flash Memory Technology - The Evolution from Floating Gate to Charge Trapping to 3D Stacking

机译：NAND闪存技术的未来前景-从浮栅到电荷陷阱再到3D堆叠的演变

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摘要

NAND Flash memory has scaled at phenomenal speed in the last decade and conventional floating gate (FG) Flash memory has now commenced volume production in the 2X nm node. Despite this stunning success, the technology challenges are formidable below 20 nm. Charge-trapping (CT) devices are promising to scale beyond 20 nm but below 10 nm both CT and FG devices hold too few electrons for robust MLC (Multi-level Cell, or more than one bit storage per cell) storage. The simpler structure and its more robust storage (not sensitive to tunnel oxide defects since charges are stored in deep trap levels) also make CT suitable for 3D stacking. Optimistically, 3D CT Flash memory may allow the density increase to continue for at least another decade beyond the 1X nm node. In this paper, we review the current status of FG devices, their scaling challenges, and the operation principles of CT devices and several variations such as TANOS and BE-SONOS. We will then discuss various 3D memory architectures, technology challenges and address the poly-silicon thin film transistor (TFT) issues.
机译：在过去的十年中，NAND闪存以惊人的速度进行了扩展，而传统的浮栅（FG）闪存现在已经开始在2X nm节点上进行批量生产。尽管取得了惊人的成功，但在20 nm以下仍面临着巨大的技术挑战。电荷捕获（CT）器件有望扩展到20 nm以上，但低于10 nm时，CT和FG器件都只能容纳很少的电子来进行强大的MLC（多级单元，或每个单元多于一位存储）存储。更简单的结构及其更坚固的存储（由于电荷存储在深陷阱层中，因此对隧道氧化物缺陷不敏感）也使CT适合3D堆叠。乐观地讲，3D CT闪存可以使密度增加至少持续10年，超出1X nm节点。在本文中，我们将回顾FG设备的现状，其扩展挑战，CT设备的工作原理以及TANOS和BE-SONOS等几种变体。然后，我们将讨论各种3D存储器体系结构，技术挑战并解决多晶硅薄膜晶体管（TFT）问题。

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