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Design and Analysis of Ring Oscillator Influenced Beat Frequency Detection for True Random Number Generation on FPGA

机译:在FPGA上产生真随机数的环形振荡器影响的拍频检测的设计与分析

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True Random Number Generators (TRNGs) became the basic building block of modern cryptography. Though most of the noise source of TRNGs is analog circuit, to provide compactness and high throughput, hardware based TRNG solutions are recommended. This work aims at the generation of true random bits through beat frequency detection influenced by identical length of ring oscillators on FPGA. The main idea of this work is to extract the true randomness from one jitter clock produced by a ring oscillator through another jitter clock generated by the second ring oscillator. To enhance the randomness, Von Neumann Corrector (VNC) post processing is utilized. Proposed TRNG is designed using VHDL and Quartus II 8.0 EDA tool. It consumes 523 combinational functions and 539 logic registers on Altera Cyclone II EP2C20F4S4C7 FPGA where it achieves the throughput of 26.640650 Mbps when 27 MHz is used as sampling clock. Statistical efficiency of the TRNG is evaluated using entropy, correlation and NIST SP 800 -22 analyses. True randomness of the TRNG is verified through restart experiment.
机译:真正的随机数生成器(TRNG)成为现代密码学的基本组成部分。尽管TRNG的大多数噪声源都是模拟电路,但是为了提供紧凑性和高吞吐量,建议使用基于硬件的TRNG解决方案。这项工作旨在通过受FPGA上相同长度的环形振荡器影响的拍频检测来生成真正的随机位。这项工作的主要思想是从一个环形振荡器产生的一个抖动时钟到第二个环形振荡器产生的另一个抖动时钟中提取真正的随机性。为了增强随机性,使用了冯·诺依曼校正器(VNC)后处理。建议的TRNG是使用VHDL和Quartus II 8.0 EDA工具设计的。它占用Altera Cyclone II EP2C20F4S4C7 FPGA上的523个组合功能和539个逻辑寄存器,当使用27 MHz作为采样时钟时,该模块可实现26.640650 Mbps的吞吐量。使用熵,相关性和NIST SP 800 -22分析评估TRNG的统计效率。通过重新启动实验可以验证TRNG的真实随机性。

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