• 主题
高级搜索  >
历史搜索 清空历史
首页> 外文会议>IEEE Symposium on VLSI Technology >Performance and Reliability of a Fully Integrated 3D Sequential Technology
【24h】

Performance and Reliability of a Fully Integrated 3D Sequential Technology

机译：完全集成的3D顺序技术的性能和可靠性

获取原文
页面导航
  • 摘要
  • 著录项
  • 相似文献
  • 相关主题

摘要

We investigate in detail, for the first time, both performance and reliability of a 3D sequential integration process. It is clearly demonstrated that the top level transistor can be successfully processed at 630°C with almost no impact on the performance and reliability of the bottom level. It is also highlighted that top level devices meet the P&NBTI reliability requirements. Finally an example of successful and robust 3D logic integration is proposed based on a 3D inverter combining a top-level PMOS with a bottom-level NMOS.
机译：我们首次详细研究了3D顺序集成过程的性能和可靠性。清楚地表明，顶层晶体管可以在630°C的温度下成功处理，而对底层的性能和可靠性几乎没有影响。还强调指出，顶级设备满足P＆NBTI可靠性要求。最后，基于结合了顶层PMOS和底层NMOS的3D逆变器，提出了成功且强大的3D逻辑集成示例。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱：kefu@zhangqiaokeyan.com

京公网安备：11010802029741号 ICP备案号：京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有

  • 客服微信

  • 服务号