首页> 外文会议>IEEE Symposium on VLSI Technology >Negative Capacitance, n-Channel, Si FinFETs: Bi-directional Sub-60 mV/dec, Negative DIBL, Negative Differential Resistance and Improved Short Channel Effect
【24h】

Negative Capacitance, n-Channel, Si FinFETs: Bi-directional Sub-60 mV/dec, Negative DIBL, Negative Differential Resistance and Improved Short Channel Effect

机译:负电容,n沟道,Si FinFET:双向Sub-60 mV / dec,负DIBL,负差分电阻和改进的短沟道效应

获取原文

摘要

We report on negative capacitance (NC) FinFETs with ferroelectric Hf0.5Zr0.5O2 (HZO) as gate dielectric on fully depleted silicon on insulator (FDSOI) substrate with various channel length (LCH) of 450 nm to 30 nm and multiple fin widths (WFIN) of 200 nm to 30 nm. We demonstrate all signature characteristics expected from NCFET: nearly hysteresis free operation (~3 mV), <;60 mV/decade subthreshold swing (SS) with an average SS of 54.5 mV/dec for ~2 orders of ID and to the best of our knowledge, for the first time in Si MOSFETs, negative Drain Induced Barrier Lowering (DIBL) and Negative Differential Resistance (NDR). Remarkably, we observe significant improvement in the short channel effect compared to control FinFETs: both SS and DIBL are substantially lower for the NCFET for the same Lch/WFin ratio. Importantly, these benefits become increasingly larger for shorter channel lengths.
机译:我们报道了具有铁电Hf的负电容(NC)FinFET 0.5 0.5 Ø 2 (HZO)作为绝缘体上完全耗尽的硅(FDSOI)衬底上具有各种沟道长度(L)的栅极电介质 CH )450 nm至30 nm和多个鳍片宽度(W FIN 200nm至30nm)。我们展示了NCFET预期的所有特征:几乎无滞后运行(〜3 mV),<; 60 mV /十年的亚阈值摆幅(SS),对于2个I阶,平均SS为54.5 mV / dec D 并且据我们所知,Si MOSFET中的漏极漏极感应势垒降低(DIBL)和负差分电阻(NDR)尚属首次。值得注意的是,与对照FinFET相比,我们观察到了短沟道效应的显着改善:对于相同的L,NCFET的SS和DIBL均显着降低 ch /瓦 FIN 比率。重要的是,对于较短的通道长度,这些好处变得越来越大。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号