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Implementation of bit-parallel lattice wave digital filters with increased maximal sample rate

机译:具有增加的最大采样率的比特平行晶格波数字过滤器的实现

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In this paper arithmetic transformations for increased maximal sample rate of bit-parallel lattice wave digital filters implemented with carry-save arithmetic are proposed. The purpose is to increase the throughput in order to allow a reduction of the power consumption through supply voltage scaling. A lattice wave digital filter can be composed of first- and second-order allpass sections which are recursive structures. This sets a bound on the maximal sample rate. The proposed transformations reduce the latency of the critical loop by reordering of arithmetic operations. The resulting structure is numerically equivalent to the original structure. Hence, the favourable properties of lattice wave digital filters, such as guaranteed stability, low coefficient sensitivity, and good dynamic range, are retained. An example of a filter implementation where the proposed transformations are applied is presented. The maximal sample rate for this example was improved by about 40% at the expense of a 10% increase of the chip area.
机译:在本文中,提出了提出了利用随剩型算术实现的比特平行晶格波数字滤波器的最大采样率的算术变换。目的是增加吞吐量,以便通过电源电压缩放减少功耗。格子波数字滤波器可以由递归结构的第一和二阶Allpass部分组成。这使得最大采样率的绑定。所提出的转换通过重新排序算术运算来降低临界环路的延迟。得到的结构在数值上等于原始结构。因此,保持了晶格波数字滤波器的有利性,例如保证稳定性,低系数灵敏度和良好的动态范围。呈现了应用所提出的变换的滤波器实现的示例。此示例的最大样本率为芯片区域增加10%的牺牲品提高了约40%。

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