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The architectural design of DSP based embedded parallel processors

机译:基于DSP的嵌入式并联处理器的架构设计

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This paper discusses the issues related to the design of embedded multiprocessor systems, with the focus on DSP-based systems. Issues that are discussed include indicators of when applications will scale into multiprocessor designs, Central Processing Unit (CPU) benchmarking, algorithm partitioning and the applicability of Symmetric Multiprocessor (SMP) and Asymmetric Multiprocessing (ASMP) architectures on embedded DSP based multiprocessor design. The purpose of this paper is not to be a definitive guide to multiprocessor design, but to be a practical and Informative discussion of insights gained by one designer in his meanderings through the difficult and sometimes deceptive field of multiprocessor systems design.
机译:本文讨论了与嵌入式多处理器系统设计有关的问题,重点是基于DSP的系统。讨论的问题包括应用程序将延长到多处理器设计,中央处理单元(CPU)基准,算法分区以及嵌入式DSP基于多处理器设计上的对称多处理器(SMP)和非对称多处理(ASMP)架构的中央处理单元(CPU)基准,算法分区和非对称多处理(ASMP)架构的指标。本文的目的不是成为多处理器设计的最终指南,而是通过困难且有时欺骗性领域的一个设计师在蜿蜒的多处理器系统设计中的一个设计师中获得的实用和信息讨论。

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