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Failure Mechanisms and Lifetime Simulation Method for Nano Scale CMOS Device

机译：纳米尺度CMOS装置的故障机制与寿命仿真方法

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摘要

In nano scale, the degradation failure mechanism for CMOS device such as hot-carrier injection, breakdown of thin oxides, electro-migration and NBTI (Negative Bias Temperature Instability) induced damage become a major reliability concern. Physics-of-Failure method is used in lifetime prediction of nano scale CMOS, which integrates loading condition, package, geometry and material with time-to-failure. Common lifetime models for these mechanisms are described and a method to estimate lifetime of nano-scale CMOS device, with simulation based on Physics-of-Failure. Through Failure Mode, Mechanism and Effect Analysis, failure mechanism and lifetime models are clarified and selected, as well as structure, material, processing parameters and environment conditions. Stress analysis, which includes electrical stress by EDA and thermal analysis by FEA (Finite Element Analysis) are carried out to acquire parameters in lifetime model. Damage accumulation algorism and competing theory are utilized to predict lifetime of the device. This method will help CMOS device design engineers better understand the failure mechanisms in nano-scale and take design-for-reliability measures.
机译：在纳米量表中，CMOS器件的降解破坏机制如热载体喷射，薄氧化物的分解，电迁移和NBTI（负偏置温度不稳定）诱导的损伤成为主要的可靠性问题。物理 - 故障方法用于纳米尺度CMOS的寿命预测，其与失败的时间集成了负载条件，包装，几何形状和材料。描述了这些机制的常见寿命模型以及估计纳米级CMOS装置的寿命的方法，基于故障物理学的仿真。通过故障模式，机制和效果分析，阐明和选择故障机制和寿命模型，以及结构，材料，处理参数和环境条件。应力分析包括EDA的电力应力和通过FEA的热分析（有限元分析）进行终身模型中的参数。损伤累积算法和竞争理论用于预测设备的寿命。这种方法将帮助CMOS设备设计工程师更好地了解纳米级的故障机制，并采取可靠性措施。

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