The use of copper as a replacement for aluminum in microelectronics is increasing dramatically because of the lower resistance and greater reliability of copper. Cu is integrated into integrated circuits in a damascene structure whereby grooves are etched into the dielectric. A barrier layer, usually TaN, is sputter deposited everywhere, followed by sputter deposition of a Cu seed layer, which is built up substantially by electroplating the majority of the copper metallization. Finally the overburden of electroplated copper is removed with chemical mechanical planarization and the remaining metal line is capped with a layer of silicon nitride. Oxidation at each stage of the metallization effects adhesion of the subsequent deposit and reliability of the overall structure. Specifically, impurities or an oxide layer on the Cu seed layer seem to adversely affect the low temperature annealing of the Cu overlayer.
展开▼
