首页> 外文会议>International Conference on Clean Energy Solutions for Sustainable Environment >Effect of different low temperatures on current transport mechanisms and frequency effect on capacitance-voltage curves for MOS-diodes
【24h】

Effect of different low temperatures on current transport mechanisms and frequency effect on capacitance-voltage curves for MOS-diodes

机译:不同低温对电流输送机制和频率效应对MOS - 二极管电气电压曲线的影响

获取原文

摘要

Thin SiO2 films with thickness 5-10 nmwere grown at 700 °C in dry ambient. The devices with oxide 5 nm approach ideality case at room temperature, in this case thermoionic emission over the barrier is dominate mechanism with traps was dominate. Capacitance-voltagedata in the form of 1/C~2 verse voltage plot has been used to extract doping on the space charge region. The barrier height from I-V calculated 0.65, 0.64 V for devices with oxide 5, 10 nm respectively, this value difference from values extract from C-V plot which found 0.57, 0.64 V.
机译:厚度为5-10 nmwere的薄SiO2薄膜在干燥环境中在700℃下生长。具有氧化物5nm的器件在室温下接近理想情况,在这种情况下,在屏障上热量排放是带有陷阱的主导机制。在1 / C〜2 Vers电压图的形式中的电容 - 电压数据用于提取空间电荷区域上的掺杂。来自I-V的屏障高度计算0.65,0.64V,对于具有氧化物5,10nm的器件,该值与从发现0.57,0.64V的C-V图的值提取物的该值差异。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号