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Design and Implementation of a High Precision Frequency Meter based on Multimode

机译：基于多模基的高精度频率计的设计与实现

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摘要

Frequency meter logical resource occupancy is the research object of electronic information field. To solve the precision of the frequency meter and reduce the occupation of logical resources, this paper designs a measurement system based on FPGA, which can switch between high frequency and intermediate frequency modes freely. Firstly, the signal generated by the dualchannel DDS function signal generator is input into the conditioning circuit for corresponding processing, and then the high-frequency mode or mid-frequency mode is selected by the DIP switch and input to the FPGA chip for counting. Finally, the measurement results are displayed on the LCD. The digital frequency meter can execute the corresponding functional test according to the mode selected in advance after testing, and it is found that compared with the modeless high-precision frequency meter, the high frequency has less 103 logical resource occupations in the high-frequency mode, and the mid-frequency has less 242 logic resources in themed-frequency mode.
机译：频率计逻辑资源占用是电子信息领域的研究对象。为了解决频率计的精度并减少逻辑资源的占用，本文设计了基于FPGA的测量系统，可以自由地在高频和中频模式之间切换。首先，通过Dualchannel DDS函数信号发生器产生的信号被输入到调节电路中以进行对应处理，然后通过DIP开关选择高频模式或中频模式并输入FPGA芯片以计数。最后，测量结果显示在LCD上。数字频率计可以根据预先在测试后选择的模式执行相应的功能测试，并发现与明亮的高精度频率计相比，高频在高频模式下具有较少的103个逻辑资源职业中间频率在主题频率模式下具有较少的242个逻辑资源。

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