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Strained-Si MOSFETs for Low-Power Applications

机译:低功率应用的应变硅MOSFET

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摘要

CMOS device/circuit performance involving mobility-enhanced strain-engineering in the channel region is studied via process and device simulations. It is shown that strained-Si (SS) devices could be applied for low-power design by lowering supply voltage. A physics-based stress induced mobility model has been developed and implemented in Synopsys Sentaurus Device simulator. The trade-offs for power and performance in strained-Si devices and circuits are discussed.
机译:通过工艺和器件仿真研究了涉及沟道区迁移率增强应变工程的CMOS器件/电路性能。结果表明,通过降低电源电压,应变硅(SS)器件可用于低功耗设计。在Synopsys Sentaurus设备仿真器中开发并实现了基于物理的应力诱发迁移率模型。讨论了应变硅器件和电路中功率和性能的权衡。

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