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Evaluating design trade-offs in customizable processors

机译:评估可定制处理器中的设计权衡

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The short time-to-market window for embedded systems demands automation of design methodologies for customizable processors. Recent research advances in this direction have mostly focused on single criteria optimization, e.g., optimizing performance though custom instructions under pre-defined area constraint. From the designer's perspective, however, it would be more interesting if the conflicting trade-offs among multiple objectives (e.g., performance versus area) are exposed enabling an informed decision making. Unfortunately, identifying the optimal trade-off points turns out to be computationally intractable. In this paper, we present a polynomial-time approximation algorithm to systematically evaluate the design trade-offs. In particular, we explore performance-area trade-offs in the context of multitasking real-time embedded applications to be implemented on a customizable processor.
机译:嵌入式系统的上市时间短,要求可定制处理器的设计方法自动化。在这个方向上的最新研究进展主要集中在单一标准的优化上,例如,在预定义的区域约束下通过定制指令来优化性能。但是,从设计者的角度来看,如果暴露出多个目标(例如,性能与面积)之间相互矛盾的折衷,从而能够做出明智的决策,将会更加有趣。不幸的是,确定最佳折衷点实际上在计算上是棘手的。在本文中,我们提出了多项式时间逼近算法来系统地评估设计的折衷。特别是,我们将在要在可定制处理器上实现的多任务实时嵌入式应用程序的上下文中探索性能区域的取舍。

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