SOURCE-DRAIN SERIES RESISTANCE: THE REAL LIMITER TO MOSFET SCALING

机译：源漏串联电阻：MOSFET标度的真正限制

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Industry transistor scaling trends for the past 30 years are examined to provide insight into possible directions for MOSFET scaling. One key direction is improvement in the source-drain external resistance. Historically external resistance has not been a dominant factor in overall device performance. However, it is shown that due to increasing oxide fields and the introduction of strained silicon (both of which reduce the channel resistance), the external resistance is projected to limit device performance if not addressed.

机译：研究了过去30年的行业晶体管缩放趋势，以深入了解MOSFET缩放的可能方向。一个关键方向是改善源极-漏极外部电阻。历史上，外部电阻并不是整个器件性能的主要因素。然而，已经表明，由于氧化物场的增加和应变硅的引入（两者均降低了沟道电阻），如果不解决，预计外部电阻会限制器件性能。

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《Proceedings vol.2004-01; International Symposium on Advanced Short-Time Thermal Processing for Si-Based CMOS Devices II; 20040510-12; San Antonio,TX(US)》|2004年|P.412-419|共8页
会议地点 San AntonioTX(US)
作者
Scott E. Thompson;
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University of Florida, Gainesville FL;

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原文格式 PDF
正文语种 eng
中图分类半导体技术;
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2. Impact of various silicide techniques on SiGe source-drain series resistance and mobility of pMOSFETs [J] . J Chang, X Ji, L Ma, Semiconductor science and technology . 2013,第11期

机译：各种硅化物技术对SiGe源漏串联电阻和pMOSFET迁移率的影响
3. Generalised method for extraction of MOSFET source-drain series resistance against temperature [J] . Emrani A., Ghibaudo G. Electronics Letters . 1993,第9期

机译：提取针对温度的MOSFET源漏串联电阻的通用方法
4. SOURCE-DRAIN SERIES RESISTANCE: THE REAL LIMITER TO MOSFET SCALING [C] . Scott E. Thompson International Symposium on Advanced Short-Time Thermal Processing for Si-Based CMOS Devices . 2004

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5. A design study on the scaling limit of ultra-thin silicon-on-insulator MOSFETs. [D] . Lu, Wei-Yuan. 2007

机译：绝缘体上超薄MOSFET比例缩放极限的设计研究。
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8. Criteria for Estimating the Impact of Series Resistance of MOSFET Performance [R] . Gildenblat, G. S., Cohen, S. S. 1988

机译：估算mOsFET性能串联电阻影响的标准

SOURCE-DRAIN SERIES RESISTANCE: THE REAL LIMITER TO MOSFET SCALING

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