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首页> 外文会议>Proceedings vol.2005-08; International Symposium on Microelectronics Technology and Devices(SBMICRO 2005); 200509; >MORE THAN 'MOORE': TOWARDS PASSIVE AND Si-BASED SYSTEM-IN-PACKAGE INTEGRATION
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MORE THAN 'MOORE': TOWARDS PASSIVE AND Si-BASED SYSTEM-IN-PACKAGE INTEGRATION

机译：超越“摩尔”：实现无源和基于Si的系统级封装集成

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Recently the first highly integrated cellular RF transceiver systems were launched using Philips' new silicon-based System-in-Package technology. This new technology utilizes back-end silicon processing to integrate passive components onto a silicon substrate that can act as a platform for the heterogeneous integration of active component dies, MEMS dies, etc. As an example, a transceiver IC can be flip-chip mounted onto this passive component silicon substrate, thus minimising interconnect parasitics and footprint area. This sub-assembly is then flipped back into a standard single IC-sized lead frame package. The passive die is made in the so-called PICS (Passive Integration Connecting Substrate) technology developed to integrate passive components such as high-Q inductors, resistors, accurate MIM capacitors and, in particular, high-density (～20-30 nF/mm~2) MOS 'trench' capacitors for decoupling and filtering. These capacitors are fabricated in silicon by dry-etching arrays of macropores with ～1.5 μm diameter and up to ～30 μm depth. Capacitors with ～30 nm ONO dielectric and poly-Si/ Al top electrode showed superior dielectric breakdown voltage (30 V typical) and very low leakage current density ＜ 1 nA/mm~2 @ 22 V. Accelerated lifetime testing at 100 ℃ indicated an intrinsic operating voltage of 10 V for 10 years. On die-level the MOS capacitors integrated in RF power amplifiers showed superior signal stability compared to identical test devices with discrete ceramic capacitors. Extremely low-loss factors were measured: ESL ＜ 40 pH and ESR ＜ 150 mΩ. Major advantage of Philips' silicon-based RF SiP technology is that it allows the integration of high-quality passive components using relatively low-cost silicon processing, while allowing active components such as transistors to be fabricated for optimum performance in other process technologies (CMOS, BiCMOS or GaAs). The first cellular IC developed is the RF transceiver UAA3587, which forms the heart of the RF front-end of Nexperia Cellular System Solutions. It reduces the number of components for the RF part on the printed circuit board by 35 compared to the previous generation and enables designs of ＜ 2.5 cm~2. Combined with the miniaturization of other components, this saving is ＞ 30 % against the best in class. Compared to the industry average, this size reduction is as high as 50 % for a more advanced RF functionality.
机译：最近，使用飞利浦基于硅的全新系统级封装技术推出了首个高度集成的蜂窝射频收发器系统。这项新技术利用后端硅工艺将无源组件集成到硅基板上，该硅基板可以用作有源组件管芯，MEMS管芯等异类集成的平台。例如，收发器IC可以倒装安装在该无源元件硅衬底上，从而使互连寄生和占位面积最小。然后将该子组件倒装到标准的单个IC尺寸的引线框架封装中。无源芯片是采用所谓的PICS（无源集成连接基板）技术制成的，该技术开发用于集成无源元件，例如高Q电感器，电阻器，精确的MIM电容器，尤其是高密度（〜20-30 nF / mm〜2）用于去耦和滤波的MOS“沟槽”电容器。这些电容器是通过对直径约1.5μm，深度约30μm的大孔阵列进行干蚀刻而制成的。具有〜30 nm ONO电介质和poly-Si / Al上电极的电容器表现出优异的介电击穿电压（典型值为30 V），并且在22 V下具有极低的泄漏电流密度＜1 nA / mm〜2。在100℃的加速寿命测试表明10 V的固有工作电压10年。在裸片级，与具有分立陶瓷电容器的相同测试设备相比，集成在RF功率放大器中的MOS电容器显示出卓越的信号稳定性。测量了极低的损耗因子：ESL ＜40 pH和ESR ＜150mΩ。飞利浦基于硅的RF SiP技术的主要优势在于，它允许使用相对低成本的硅工艺集成高质量的无源组件，同时允许制造诸如晶体管之类的有源组件，以在其他工艺技术（CMOS）中获得最佳性能。 ，BiCMOS或GaAs）。开发的第一个蜂窝IC是RF收发器UAA3587，它构成Nexperia蜂窝系统解决方案的RF前端的核心。与上一代产品相比，它减少了印刷电路板上RF部件的数量，减少了35个，并实现了<2.5 cm〜2的设计。与其他组件的小型化相结合，与同类产品中的同类产品相比，该节省量＞ 30％。与业界平均水平相比，采用更先进的射频功能，尺寸可减少多达50％。

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