首页> 外文会议>Requirements Engineering (RE 2007) >A comparative study of charge trapping effects in LDDsurface-channel and buried-channel pMOS transistors using chargeprofiling and threshold voltage shift measurements

【24h】

A comparative study of charge trapping effects in LDDsurface-channel and buried-channel pMOS transistors using chargeprofiling and threshold voltage shift measurements

机译：使用电荷 n轮廓分析和阈值电压偏移测量比较LDD n表面沟道和掩埋沟道pMOS晶体管中的电荷陷阱效应

获取原文

获取原文并翻译 | 示例

页面导航

摘要
著录项
相似文献
相关主题

摘要

Extracted charge profiles of lightly-doped drain (LDD)nsurface-channel and buried-channel pMOS devices stressed undernhot-carrier injection conditions reveal predominant electron trappingnnear the gate edge at the drain region in both cases. From thresholdnvoltage measurements, there is some evidence of hole trapping after longnstress times in surface-channel pMOSFETs, but not in buried-channelndevices

机译：在热载流子注入条件下受到应力的轻掺杂漏极（LDD）n沟道和掩埋沟道pMOS器件的提取电荷分布表明，在两种情况下，主要的电子陷阱都靠近漏极区域的栅极边缘。根据阈值电压测量，有一些证据表明，在表面沟道pMOSFET中，应力持续时间过长会导致空穴陷阱，但在埋入沟道n器件中则不会

著录项

来源
《Requirements Engineering (RE 2007)》|2007年|p.200-205|共6页
会议地点
作者
Kok C.K.; Chew W.C.; Chim W.K.; Chan D.S.H.; Leang S.E.;
展开▼
作者单位

Centre for Integrated Circuit Failure Analysis Reliability, Nat. Univ. of Singapore;

展开▼
会议组织
原文格式 PDF
正文语种 eng
中图分类自动化技术、计算机技术;
关键词

相似文献

外文文献
中文文献
专利

1. The contribution of border traps to the threshold voltage shift in pMOS dosimetric transistors [J] . Savic Z., Radjenovic B. IEEE Transactions on Nuclear Science . 1995,第4期

机译：边界陷阱对pMOS剂量晶体管中阈值电压漂移的影响
2. Bias-stress-induced threshold voltage shift dependence of negative charge trapping in the amorphous indium tin zinc oxide thin-film transistors [J] . Cam Phu Thi Nguyen, Thanh Thuy Trinh, Vinh Ai Dao, Semiconductor science and technology . 2013,第10期

机译：偏置应力引起的非晶铟锡氧化锌薄膜晶体管中负电荷俘获的阈值电压偏移依赖性
3. Exciton dissociation and charge trapping at poly(3-hexylthiophene)/phenyl-C61-butyric acid methyl ester bulk heterojunction interfaces: Photo-induced threshold voltage shifts in organic field-effect transistors and solar cells [J] . Park Byoungnam Journal of Applied Physics . 2012,第8期

机译：聚（3-己基噻吩）/苯基-C61-丁酸甲酯本体异质结界面处的激子解离和电荷俘获：有机场效应晶体管和太阳能电池中的光诱导阈值电压漂移
4. A comparative study of charge trapping effects in LDD surface-channel and buried-channel pMOS transistors using charge profiling and threshold voltage shift measurements [C] . Kok, C.K., Chew, . 1999

机译：使用电荷分布和阈值电压偏移测量比较LDD表面沟道和掩埋沟道pMOS晶体管中的电荷俘获效应
5. Charge trapping effects on mobility and threshold voltage instability in high-k gate stacks. [D] . Sim, Jang Hoan. 2005

机译：电荷陷阱对高k栅极堆叠中的迁移率和阈值电压不稳定性产生影响。
6. Voltage-Polarity Dependent Programming Behaviors of Amorphous In–Ga–Zn–O Thin-Film Transistor Memory with an Atomic-Layer-Deposited ZnO Charge Trapping Layer [O] . Dan-Dan Liu, Wen-Jun Liu, Jun-Xiang Pei, 2019

机译：带有原子层沉积ZnO电荷陷阱层的非晶In-Ga-Zn-O薄膜晶体管存储器的电压极性相关编程行为
7. Charge Trapping by Self-Assembled Monolayers as the Origin of the Threshold Voltage Shift in Organic Field-Effect Transistors [O] . Gholamrezaie Fatemeh, Andringa Anne-Marije, Roelofs W. S. Christian, 2012

机译：自组装单分子层的电荷陷阱是有机场效应晶体管阈值电压漂移的根源

A comparative study of charge trapping effects in LDDsurface-channel and buried-channel pMOS transistors using chargeprofiling and threshold voltage shift measurements

摘要

著录项

相似文献

相关主题

期刊订阅