Influence of the S/D architecture on the Vt of deep submicron MOSFETs

机译：S / D架构对深亚微米MOSFET的Vt的影响

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In this paper, the influence of the source/drain (S/D) architecture on the short channel effect (SCE) and the device performance (through R_s) is investigated using both experimental and simulation results. While most existing models relate the SCE and performance only to the oxide thickness (T_(OX)) and substrate doping (N_(sub)), we show that there exists a universal curve for the threshold voltage roll-off (ΔV~T) for various different S/D profiles. The question of which 'L' should be taken in SCE models is addressed.

机译：本文利用实验和仿真结果研究了源/漏（S / D）体系结构对短沟道效应（SCE）和器件性能（通过R_s）的影响。尽管大多数现有模型仅将SCE和性能与氧化物厚度（T_（OX））和衬底掺杂（N_（sub））相关联，但我们表明存在阈值电压滚降（ΔV〜T）的通用曲线用于各种不同的S / D配置文件。解决了在SCE模型中应使用哪个“ L”的问题。

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来源
《Simulation of semiconductor processes and devices 1998(SISPAD98)》|1998年|308-311|共4页
会议地点 Leuven(BE);Leuven(BE)
作者
Serge Biesemans; Kristin De Meyer;
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作者单位

ASP-division, IMEC, Kapeldreef 75, B-3001 Leuven, Belgium;

ASP-division, IMEC, Kapeldreef 75, B-3001 Leuven, Belgium ESAT, KULeuven, Kardinaal Mercierlaan 94, B-3001 Leuven, Belgium;

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正文语种 eng
中图分类半导体器件制造工艺及设备;
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Influence of the S/D architecture on the Vt of deep submicron MOSFETs

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