Device Simulator Calibration for Quartermicron CMOS Devices

机译：四分之一微米CMOS器件的器件模拟器校准

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We present the calibration of a device simulator for a 0.25 μm CMOS technology using response surface methodology. For this process several measurements for different gate lengths (0.2-4.0 μm) were made. Care was taken to eliminate the statistical variations typical to sub-micron devices by measuring several chips on the the same wafer and taking an average sample. The simulations carried out with the calibrated parameters show an error smaller than 2.4% for both the long-channel and the short-channel device.

机译：我们介绍了使用响应面方法对0.25μmCMOS技术进行的设备模拟器的校准。对于此过程，针对不同的栅极长度（0.2-4.0μm）进行了多次测量。通过在同一晶片上测量多个芯片并取平均样本，小心消除亚微米设备的典型统计差异。使用校准参数进行的仿真显示，长通道和短通道设备的误差均小于2.4％。

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来源
《Simulation of semiconductor processes and devices 1998(SISPAD98)》|1998年|93-96|共4页
会议地点 Leuven(BE);Leuven(BE)
作者
T. Grasser; R. Strasser; M. Knaipp; K. Tsuneno; H. Masuda; S. Selberherr;
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Institute for Microelectronics, TU Vienna Gusshausstr. 27-29, A-1040 Vienna, Austria;

Institute for Microelectronics, TU Vienna Gusshausstr. 27-29, A-1040 Vienna, Austria;

Institute for Microelectronics, TU Vienna Gusshausstr. 27-29, A-1040 Vienna, Austria;

Hitachi, Ltd., 16-3, Shinmachi 6-Chome Ome-shi, Tokyo 198-8512, Japan;

Hitachi, Ltd., 16-3, Shinmachi 6-Chome Ome-shi, Tokyo 198-8512, Japan;

Institute for Microelectronics, TU Vienna Gusshausstr. 27-29, A-1040 Vienna, Austria;

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正文语种 eng
中图分类半导体器件制造工艺及设备;
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4. Device Simulator Calibration for Quartermicron CMOS Devices [C] . T. Grasser, R. Strasser, M. Knaipp, International conference on simulation of semiconductor devices and processes . 1998

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Device Simulator Calibration for Quartermicron CMOS Devices

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