Layout-Based 3D Solid Modeling of IC Structures and Interconnects Including Electrical Parameter Extraction

机译：IC结构和互连的基于布局的3D实体建模，包括电参数提取

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A suite of software tools have been developed to model IC structures including interconnects based on layout design and processing information. The modeling capabilities include 3D rendering of solid objects, surface meshing, electrical parameter (mainly capacitance) extraction for arbitrarily shaped objects. This software ensemble provides a direct link between design parameters and electrical performance. Analysis of a four transistor SRAM cell is used as an example.

机译：已经开发出一套软件工具来对IC结构进行建模，包括基于布局设计和处理信息的互连。建模功能包括实体对象的3D渲染，表面网格划分，任意形状对象的电参数（主要是电容）提取。该软件集合提供了设计参数和电气性能之间的直接链接。以四晶体管SRAM单元的分析为例。

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来源
《Simulation of semiconductor processes and devices 1998(SISPAD98)》|1998年|61-64|共4页
会议地点 Leuven(BE);Leuven(BE)
作者
Xiaoning Qi; Sherry Y. Shen; Ze-Kai Hsiau; Zhiping Yu; Robert Dutton;
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作者单位

Center for Integrated Systems, Stanford University CISX 335, Stanford University Stanford, CA 94305-4075, USA;

Center for Integrated Systems, Stanford University CISX 335, Stanford University Stanford, CA 94305-4075, USA;

Center for Integrated Systems, Stanford University CISX 335, Stanford University Stanford, CA 94305-4075, USA;

Center for Integrated Systems, Stanford University CISX 335, Stanford University Stanford, CA 94305-4075, USA;

Center for Integrated Systems, Stanford University CISX 335, Stanford University Stanford, CA 94305-4075, USA;

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原文格式 PDF
正文语种 eng
中图分类半导体器件制造工艺及设备;
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4. Layout-Based 3D Solid Modeling of IC Structures and Interconnects Including Electrical Parameter Extraction [C] . Xiaoning Qi, Sherry Y. Shen, Ze-Kai Hsiau, International conference on simulation of semiconductor devices and processes . 1998

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Layout-Based 3D Solid Modeling of IC Structures and Interconnects Including Electrical Parameter Extraction

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