The paper describes the design, layout, fabrication, and surface characterization of highly optimized surface micromachined micromirror devices. Design considerations and fabrication capabilities are presented. These devices are fabricated in the state-of-the-art, four-level, planarized, ultra-low-stress polysilicon process available at Sandia national Laboratories known as the sandia Ultra-planar Multi-level MEMS Technology (SUMMiT). This enabling process permits the development of micromirror devices with near-ideal characteristics that have previously been unrealizable in standard three-leyar polysilicon processes. The reduced 1 mu m minimum feature sizes and 0.1 mu m mask resolution make it possible to produce dense wiring patterns and irregularly shaped flexures. Likewise, mirror surfaces can be uniquely distributed and segmented in advanced patterns and often irregular shapes in order to minimize wavefront error across the pupil. The ultra-low-stress plysilicon and planarized upper layuer allow designers to make larger and more complex micromirrors of varying shape and surface area within an array while maintaining uniform performirror arrays and make it possible to optimize devices according to the capabilities of the fabrication process. Micromirrors fabricated in this process have demonstrated a surface variance across the array from only 2-3 nm to a worst case of roughly 25 nm while boasting active surface areas of 98
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