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A SINGLE-CHIP MPEG/AUDIO DECODER LSI BASED ON A COMPACT DECODING ALGORITHM

机译:基于紧凑解码算法的单片MPEG / AUDIO解码器LSI

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摘要

A single-chip decoder LSI is developed for audio bit-stream specified by ISO/IEC MPEG (the International Organisation for Standardisation/the International Electrotechnical Commission Moving Pictures Expert Group). The applicable layers are Layer I and II of MPEG-1 and MPEG-2/lower-sampling-frequency mode. To reduce on-chip memory for audio signal synthesis the LSI employs a fast calculation algorithm that was developed when the decoder was realized by signal processors. The reliability in bitstream synchronization is improved by checking bitstream inconsistency. Bitstream error concealment by repeating previous audio data is supported. The decoding delay is adjustable when connected with an optional external memory.
机译:针对ISO / IEC MPEG(国际标准化组织/国际电工委员会运动图像专家组)规定的音频比特流,开发了单芯片解码器LSI。适用的层是MPEG-1和MPEG-2 /较低采样频率模式的I和II层。为了减少用于音频信号合成的片上存储器,LSI采用了一种快速计算算法,该算法是在信号处理器实现解码器时开发的。通过检查比特流不一致,可以提高比特流同步的可靠性。支持通过重复以前的音频数据来隐藏比特流错误。与可选的外部存储器连接时,解码延迟是可调的。

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